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From:   Kostya Porotchkin <kostap@marvell.com>
To:     Russell King - ARM Linux admin <linux@armlinux.org.uk>
CC:     Baruch Siach <baruch@tkos.co.il>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
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        "jaz@semihalf.com" <jaz@semihalf.com>,
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        Nadav Haklai <nadavh@marvell.com>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        Stefan Chulski <stefanc@marvell.com>,
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        Ben Peled <bpeled@marvell.com>,
        "sebastian.hesselbarth@gmail.com" <sebastian.hesselbarth@gmail.com>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>
Subject: RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings
Thread-Topic: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings
Thread-Index: AQHW+jD04fJzej2FY0aIGyOLdCg1f6pGdPSAgAAJqBCAAAGXAIAAAY2w
Date:   Wed, 3 Feb 2021 14:50:45 +0000
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> -----Original Message-----
> From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
> Sent: Wednesday, February 3, 2021 16:39
> To: Kostya Porotchkin <kostap@marvell.com>
> Cc: Baruch Siach <baruch@tkos.co.il>; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org; andrew@lunn.ch; jaz@semihalf.com;
> gregory.clement@bootlin.com; Nadav Haklai <nadavh@marvell.com>;
> robh+dt@kernel.org; Stefan Chulski <stefanc@marvell.com>;
> mw@semihalf.com; Ben Peled <bpeled@marvell.com>;
> sebastian.hesselbarth@gmail.com; linux-arm-kernel@lists.infradead.org
> Subject: Re: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
> settings
>=20
> On Wed, Feb 03, 2021 at 02:37:22PM +0000, Kostya Porotchkin wrote:
> > Hi, Baruch,
> >
> > > -----Original Message-----
> > > From: Baruch Siach <baruch@tkos.co.il>
> > > Sent: Wednesday, February 3, 2021 15:59
> > > To: Kostya Porotchkin <kostap@marvell.com>
> > > Cc: linux-kernel@vger.kernel.org; devicetree@vger.kernel.org;
> > > andrew@lunn.ch; jaz@semihalf.com; gregory.clement@bootlin.com;
> > > linux@armlinux.org.uk; Nadav Haklai <nadavh@marvell.com>;
> > > robh+dt@kernel.org; Stefan Chulski <stefanc@marvell.com>;
> > > mw@semihalf.com; Ben Peled <bpeled@marvell.com>;
> > > sebastian.hesselbarth@gmail.com;
> > > linux-arm-kernel@lists.infradead.org
> > > Subject: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
> > > settings
> > >
> > > External Email
> > >
> > > --------------------------------------------------------------------
> > > --
> > > Hi Konstantin,
> > >
> > > On Wed, Feb 03 2021, kostap@marvell.com wrote:
> > > > From: Konstantin Porotchkin <kostap@marvell.com>
> > > >
> > > > Update the settings for AP806 SDHCI interface according to latest
> > > > Xenon drivers changes.
> > > > - no need to select the PHY slow mode anymore
> > >
> > > Why? Has anything changed since the introduction of
> > > marvell,xenon-phy-slow- mode?
> > [KP] AP806 B0, AP807 and later do not need the "slow mode" set by the
> default.
> > The HWE-7296210 errata is not applicable to these components and they
> > are able to run  AP SDHCI in HS400 8-bit mode.
>=20
> So what about all those people, such as me, who have A0 silicon on their
> Macchiatobin boards?
>=20
> You can't just go around removing DT properties like this.
>=20
[KP] So for older systems this "slow mode" parameter could be set on the bo=
ard level.
When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, ev=
en if they support HS400 on AP side.
MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v" flag=
 set, so it should remain in low speed anyway.

> --
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> rL4Q_voTqxrlYU6KKE&e=3D
> FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!