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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM5PR18MB1452.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1c60da55-2355-49d7-5b36-08d8c854eb68 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Feb 2021 15:03:52.3378 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: OdTmWlRHiJsfFpsTWxadk/ZeM3xxZNvXdhxJxzpmNQQLGLLc0EisSVRdZtEdobIMCiCNbJtKG9aJhEWepNB17w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR18MB1067 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.737 definitions=2021-02-03_06:2021-02-03,2021-02-03 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: linux-arm-kernel On > Behalf Of Kostya Porotchkin > Sent: Wednesday, February 3, 2021 16:51 > To: Russell King - ARM Linux admin > Cc: devicetree@vger.kernel.org; Baruch Siach ; > andrew@lunn.ch; jaz@semihalf.com; gregory.clement@bootlin.com; linux- > kernel@vger.kernel.org; Nadav Haklai ; > robh+dt@kernel.org; Stefan Chulski ; > mw@semihalf.com; Ben Peled ; linux-arm- > kernel@lists.infradead.org; sebastian.hesselbarth@gmail.com > Subject: RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI > settings [KP]=20 > > > > Hi Konstantin, > > > > > > > > On Wed, Feb 03 2021, kostap@marvell.com wrote: > > > > > From: Konstantin Porotchkin > > > > > > > > > > Update the settings for AP806 SDHCI interface according to > > > > > latest Xenon drivers changes. > > > > > - no need to select the PHY slow mode anymore > > > > > > > > Why? Has anything changed since the introduction of > > > > marvell,xenon-phy-slow- mode? > > > [KP] AP806 B0, AP807 and later do not need the "slow mode" set by > > > the > > default. > > > The HWE-7296210 errata is not applicable to these components and > > > they are able to run AP SDHCI in HS400 8-bit mode. > > > > So what about all those people, such as me, who have A0 silicon on > > their Macchiatobin boards? > > > > You can't just go around removing DT properties like this. > > > [KP] So for older systems this "slow mode" parameter could be set on the > board level. > When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, = even if > they support HS400 on AP side. > MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v" fl= ag > set, so it should remain in low speed anyway. [KP] I also forgot to mention this code piece in Xenon driver: /* Disable HS200 on Armada AP806 */ if (priv->hw_version =3D=3D XENON_AP806) host->quirks2 |=3D SDHCI_QUIRK2_BROKEN_HS200; >=20 > > -- > > RMK's Patch system: https://urldefense.proofpoint.com/v2/url?u=3Dhttps- > > > 3A__www.armlinux.org.uk_developer_patches_&d=3DDwIBAg&c=3DnKjWec2b6R0 > > mOyPaz7xtfQ&r=3D- > > > N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=3DyMC9YPQXZUm > > > QPwlD7KCTVoVTPXCTQwTXD2yVsAo6sxA&s=3DOuBO2QArzHvV4k_vsNZdmSoDX > > rL4Q_voTqxrlYU6KKE&e=3D > > FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! >=20 > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > https://urldefense.proofpoint.com/v2/url?u=3Dhttp- > 3A__lists.infradead.org_mailman_listinfo_linux-2Darm- > 2Dkernel&d=3DDwICAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3D- > N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=3D8f- > 1fnISJVHCS4gZTeFgRPXGPiwBevUsFbmYDBmkRWM&s=3DRBlEEUXG0sOmZHsQ > Omurf018V8kSE_IMZR7bDLVJ0FA&e=3D