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Subject: Re: [PATCH V3 04/14] coresight: ete: Add support for ETE sysreg
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To:     Mathieu Poirier <mathieu.poirier@linaro.org>,
        Anshuman Khandual <anshuman.khandual@arm.com>
Cc:     linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
        mike.leach@linaro.org, lcherian@marvell.com,
        linux-kernel@vger.kernel.org
References: <1611737738-1493-1-git-send-email-anshuman.khandual@arm.com>
 <1611737738-1493-5-git-send-email-anshuman.khandual@arm.com>
 <20210202175241.GC1536093@xps15>
From:   Suzuki K Poulose <suzuki.poulose@arm.com>
Message-ID: <c5e68822-2407-e72e-d31e-620ffc08294c@arm.com>
Date:   Wed, 3 Feb 2021 15:51:09 +0000
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On 2/2/21 5:52 PM, Mathieu Poirier wrote:
> On Wed, Jan 27, 2021 at 02:25:28PM +0530, Anshuman Khandual wrote:
>> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>>
>> Add support for handling the system registers for Embedded Trace
>> Extensions (ETE). ETE shares most of the registers with ETMv4 except
>> for some and also adds some new registers. Re-arrange the ETMv4x list
>> to share the common definitions and add the ETE sysreg support.
>>
>> Cc: Mike Leach <mike.leach@linaro.org>
>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>>   drivers/hwtracing/coresight/coresight-etm4x-core.c | 32 +++++++++++++
>>   drivers/hwtracing/coresight/coresight-etm4x.h      | 52 ++++++++++++++++++----
>>   2 files changed, 75 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> index 9edf8be..9e92d2a 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> @@ -114,6 +114,38 @@ void etm4x_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit)
>>   	}
>>   }
>>   
>> +u64 ete_sysreg_read(u32 offset, bool _relaxed, bool _64bit)
>> +{
>> +	u64 res = 0;
>> +
>> +	switch (offset) {
>> +	ETE_READ_CASES(res)
>> +	default :
>> +		WARN_ONCE(1, "ete: trying to read unsupported register @%x\n",
>> +			 offset);
> 
> Alignment
> 
>> +	}
>> +
>> +	if (!_relaxed)
>> +		__iormb(res);	/* Imitate the !relaxed I/O helpers */
>> +
>> +	return res;
>> +}
>> +
>> +void ete_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit)
>> +{
>> +	if (!_relaxed)
>> +		__iowmb();	/* Imitate the !relaxed I/O helpers */
>> +	if (!_64bit)
>> +		val &= GENMASK(31, 0);
>> +
>> +	switch (offset) {
>> +	ETE_WRITE_CASES(val)
>> +	default :
>> +		WARN_ONCE(1, "ete: trying to write to unsupported register @%x\n",
>> +			offset);
> 
> Alignment
> 
>> +	}
>> +}
> 
> The etm4x_sysreg_xyz() equivalent of these use a pr_warn_ratelimited() rather
> than a WARN_ONE().
> 
> With that:
> 
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

Converted to pr_warn_ratelimited() to both instances and fixed Alignment

Cheers
Suzuki