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Date:   Wed, 3 Feb 2021 16:11:38 +0000
From:   Russell King - ARM Linux admin <linux@armlinux.org.uk>
To:     Kostya Porotchkin <kostap@marvell.com>
Cc:     Baruch Siach <baruch@tkos.co.il>,
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        "jaz@semihalf.com" <jaz@semihalf.com>,
        "gregory.clement@bootlin.com" <gregory.clement@bootlin.com>,
        Nadav Haklai <nadavh@marvell.com>,
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        Stefan Chulski <stefanc@marvell.com>,
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        <linux-arm-kernel@lists.infradead.org>
Subject: Re: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings
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On Wed, Feb 03, 2021 at 02:50:45PM +0000, Kostya Porotchkin wrote:
> [KP] So for older systems this "slow mode" parameter could be set on the board level.
> When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, even if they support HS400 on AP side.
> MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v" flag set, so it should remain in low speed anyway.

Your reasoning does not make sense.

The ap80x.dtsi file does not specify "marvell,xenon-phy-slow-mode".
It is not specified at this level. It is already specified at board
level.

Given that Macchiatobin will still use slow mode, why remove the
marvell,xenon-phy-slow-mode property from this file?

Also, if you're upgrading ap80x.dtsi to use a bus-width of 8, why
keep the bus-width specifier of 8 in the board files?

This patch just doesn't make sense, and your responses to our points
seem to add to the confusion.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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