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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id a25sm1135471eds.48.2021.02.03.08.52.46 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Feb 2021 08:52:46 -0800 (PST) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, gregkh@linuxfoundation.org, balbi@kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/7] dts64: rockchip: enable dwc3 usb for A95X Z2 Date: Wed, 3 Feb 2021 17:52:33 +0100 Message-Id: <20210203165233.22177-7-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210203165233.22177-1-jbx6244@gmail.com> References: <20210203165233.22177-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable dwc3 usb for A95X Z2. Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts index 30c73ef25..e71870768 100644 --- a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts @@ -357,6 +357,11 @@ status = "okay"; }; +&usbdrd3 { + dr_mode = "host"; + status = "okay"; +}; + &usb_host0_ehci { status = "okay"; }; -- 2.11.0