Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp816367pxb; Wed, 3 Feb 2021 19:59:38 -0800 (PST) X-Google-Smtp-Source: ABdhPJw+5ql1sJz5zdQTfdFFeQMhY7T8pUCRZ/88rJo7T/y+WzcBQUfysvwkLST2+JBL8AxwT0wL X-Received: by 2002:a17:906:c05a:: with SMTP id bm26mr6407299ejb.288.1612411177838; Wed, 03 Feb 2021 19:59:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612411177; cv=none; d=google.com; s=arc-20160816; b=JyZFDXidmQVVCX1iNR3vd6PUDI2bQREtWK8WKs9U4IBLG0HsdUlC4g24yRwbuan/rU LdCsKQaPYUS8ov6wNn2uavoBLEpGPy8lPjKeML3wMb97sTNtF7WxCg7NMIg/IQ3iZZpl ExhdeFAUrrwJi13FxVlbmHng8U4mdeW/vCMO5P4j7r7mdYXS3fnjS9qdgN58++0B4PmX +Vjwp3VRcD9UHLug/6ADJWo4IQsjLraoUSSv2hZmweG9M6UpYeRWPJeFINqnnnqbGjzO Jf82aQ3H5cqAdYf7a3kiEH4eo2DUcQ4EQSlknSECSbrZGeW1EOXdoW54u0UgOGkr6tBT xMmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=x0gQOUunnQNw1YKSkH4qqgXFrEpdOVRSIYkcQZeC3w4=; b=0QoySlqHQv7MHJGqer/QEnlwIYtZ8/XBpl3bO1kJSef7uYS2yTGLn+x8e8d9pAx9V7 jTOsNC/0ug1Hb/njv8BDw8w4ltCO9wlc+k8dsmKdXYPw6TNc2qs5VBugvcnx/YeSse3J ioKfzDtYcvbv4B70xsLyAG6NeoS2gqlL7TujMQYsWH9gNrym/6ybwHVA8FjSIMqQODjL OdHoBtmMLIrWNDCW/VVo5wiFtAHNDNTJRzN24rCWvKKoul4yaNMfiCuR2xzhaA36TDSq SmAqGQdcaniQKXyFwdITKfbm98OqsIgEwuboP8n2l5ZoVvdc4DdXJMlo/U5Oc8D2Mt6D KTNw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id gv30si2564089ejc.474.2021.02.03.19.59.13; Wed, 03 Feb 2021 19:59:37 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234527AbhBDCCt (ORCPT + 99 others); Wed, 3 Feb 2021 21:02:49 -0500 Received: from mail.v3.sk ([167.172.186.51]:53800 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S232768AbhBDCCr (ORCPT ); Wed, 3 Feb 2021 21:02:47 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id E778EE0BB3; Thu, 4 Feb 2021 01:57:52 +0000 (UTC) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id XMmrYTYW4xfz; Thu, 4 Feb 2021 01:57:50 +0000 (UTC) Received: from localhost (localhost.localdomain [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 823C9E0BB2; Thu, 4 Feb 2021 01:57:50 +0000 (UTC) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id ovieJ57w_w99; Thu, 4 Feb 2021 01:57:50 +0000 (UTC) Received: from localhost (unknown [109.183.109.54]) by zimbra.v3.sk (Postfix) with ESMTPSA id 3E5DDE0BB1; Thu, 4 Feb 2021 01:57:50 +0000 (UTC) From: Lubomir Rintel To: Stephen Boyd Cc: Michael Turquette , Ivan Najdanovic , Lucas Stach , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/1] clk: mmp2: Enable the 3D GPU clock alongside the 2D clock Date: Thu, 4 Feb 2021 03:01:54 +0100 Message-Id: <20210204020155.527556-1-lkundrak@v3.sk> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Please consider applying the sad little patch chained to this message. It is a workaround that makes the 2D GPU work on MMP3 when the 3D GPU is not used. It's been observed that the 2D GPU won't work when what is understood to = be the 3D GPU clock is turned off. The etnaviv developers suggest [1][2] tha= t perhaps said understanding is wrong and they may be right. Unfortunately = no documentation is available, all we know is the register names. In any case it seems to make more sense to put the workaround in the MMP clock driver instead of to the etnaviv driver. [1] https://lists.freedesktop.org/archives/etnaviv/2020-November/003442.h= tml [2] https://lists.freedesktop.org/archives/etnaviv/2020-December/003445.h= tml Thanks Lubo