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Date:   Thu, 4 Feb 2021 14:24:25 -0800
From:   Ben Widawsky <ben.widawsky@intel.com>
To:     "John Groves (jgroves)" <jgroves@micron.com>
Cc:     Dan Williams <dan.j.williams@intel.com>,
        Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
        "linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
        Linux ACPI <linux-acpi@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-nvdimm <linux-nvdimm@lists.01.org>,
        Linux PCI <linux-pci@vger.kernel.org>,
        Bjorn Helgaas <helgaas@kernel.org>,
        Chris Browy <cbrowy@avery-design.com>,
        Christoph Hellwig <hch@infradead.org>,
        Ira Weiny <ira.weiny@intel.com>,
        Jon Masters <jcm@jonmasters.org>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        Rafael Wysocki <rafael.j.wysocki@intel.com>,
        Randy Dunlap <rdunlap@infradead.org>,
        Vishal Verma <vishal.l.verma@intel.com>,
        "daniel.lll@alibaba-inc.com" <daniel.lll@alibaba-inc.com>,
        "Kelley, Sean V" <sean.v.kelley@intel.com>,
        David Rientjes <rientjes@google.com>
Subject: Re: [EXT] Re: [PATCH 04/14] cxl/mem: Implement polled mode mailbox
Message-ID: <20210204222425.5vlulgaip7stal3z@intel.com>
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On 21-02-04 21:53:29, John Groves (jgroves) wrote:
>    Micron Confidential
> 
> 
> 
>    From: Dan Williams <dan.j.williams@intel.com>
>    Date: Monday, February 1, 2021 at 1:28 PM
>    To: Ben Widawsky <ben.widawsky@intel.com>
>    Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
>    linux-cxl@vger.kernel.org <linux-cxl@vger.kernel.org>, Linux ACPI
>    <linux-acpi@vger.kernel.org>, Linux Kernel Mailing List
>    <linux-kernel@vger.kernel.org>, linux-nvdimm
>    <linux-nvdimm@lists.01.org>, Linux PCI <linux-pci@vger.kernel.org>,
>    Bjorn Helgaas <helgaas@kernel.org>, Chris Browy
>    <cbrowy@avery-design.com>, Christoph Hellwig <hch@infradead.org>, Ira
>    Weiny <ira.weiny@intel.com>, Jon Masters <jcm@jonmasters.org>, Jonathan
>    Cameron <Jonathan.Cameron@huawei.com>, Rafael Wysocki
>    <rafael.j.wysocki@intel.com>, Randy Dunlap <rdunlap@infradead.org>,
>    Vishal Verma <vishal.l.verma@intel.com>, daniel.lll@alibaba-inc.com
>    <daniel.lll@alibaba-inc.com>, John Groves (jgroves)
>    <jgroves@micron.com>, Kelley, Sean V <sean.v.kelley@intel.com>
>    Subject: [EXT] Re: [PATCH 04/14] cxl/mem: Implement polled mode mailbox
> 
>    CAUTION: EXTERNAL EMAIL. Do not click links or open attachments unless
>    you recognize the sender and were expecting this message.
>    On Mon, Feb 1, 2021 at 11:13 AM Ben Widawsky <ben.widawsky@intel.com>
>    wrote:
>    >
>    > On 21-02-01 12:54:00, Konrad Rzeszutek Wilk wrote:
>    > > > +#define
>    cxl_doorbell_busy(cxlm)
>    \
>    > > > +   (cxl_read_mbox_reg32(cxlm, CXLDEV_MB_CTRL_OFFSET)
>    &                    \
>    > > > +    CXLDEV_MB_CTRL_DOORBELL)
>    > > > +
>    > > > +#define CXL_MAILBOX_TIMEOUT_US 2000
>    > >
>    > > You been using the spec for the values. Is that number also from it
>    ?
>    > >
>    >
>    > Yes it is. I'll add a comment with the spec reference.
> 
> 
> 
>    From section 8.2.8.4 in the CXL 2.0 spec: “The mailbox command timeout
>    is 2 seconds.”  So this should be:
> 
> 
>    #define CXL_MAILBOX_TIMEOUT_US 2000000
> 
> 
>    …right? 2000us is 2ms…
> 
> 

Thanks. This was caught already in earlier review by David Rientjes
<rientjes@google.com>

It's renamed CXL_MAILBOX_TIMEOUT_MS 2000