Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp1597220pxb; Thu, 4 Feb 2021 18:04:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJzoz03srcgcBPTm7ad16gGLRdSIJOjyq0uIkuOt6xhF9aHbxkKUTyAFJu1hsXOjn5Bcdszp X-Received: by 2002:a05:6402:306c:: with SMTP id bs12mr1379499edb.348.1612490667686; Thu, 04 Feb 2021 18:04:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612490667; cv=none; d=google.com; s=arc-20160816; b=qPL9C2PYplhqf6lu0a+gJMy8dwLf5cdExbV6WOcVe3RJiOSIAqvRGU0fKa9I+tpfiS x9l/xwVZjEJj6ca+Hdw0CnA2QQGu1NQN7KrUitFT2bjw/i7ZrxW5Y6ym347TSo30UzzT 5B8j20P7PYk4OmFWK4JeoSbDzGEGSkTodjKg+zVVmLl/xcM5vTphA83h4qjUyHZsNtVU GAQqWr12AdknJDCUbIc6HJf9Fw4FzTpbV/zQPGGd425+hHMI3bRbzyIpEMOgz3txQkiD SSzAeug25OQvjQkkUXyPOcPTXgnK/INSed8kNq0/Kly4yGcv/cp+KkCIai9svpeFBp5y gCqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:mime-version:message-id:date :sender:dkim-signature; bh=Ou7Twm7dwyYgMW0x+HwD1Y+xevZetv77gEBdmsc8Q94=; b=WI/A+RaycQcAIjiSzuivxP67YYQatXouGas3hDbHXKR1G2eBePFp4zdOim4cnZ5Yyw 9hLt89cReyBVezZff7SH2x4uAJkjSN4c8+AC32W0pMb7XaC0X8/AfRPb+xUScAv3dQv0 v334wpL8UQFBNIPiPUTKfV5OUeWIm7HqDcbYXTmInuZ6UkuKY04FI7ypTWNF7nkwf2yI OtOzlbT9fmpcZrtCKptg3T/pHIOI/W79/ttr6V9rpTAnhAmTj/gUhI+eYpZxPiDQNEwy +V1YHJSYOf7MW99m72ShXpWq27zS5osVcWnjeRvqW9F39fNvWgYsWK0KvEm6fKkMgC3c hlsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=GdNa1rPN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cn3si5057947edb.69.2021.02.04.18.04.03; Thu, 04 Feb 2021 18:04:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=GdNa1rPN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232778AbhBEBjy (ORCPT + 99 others); Thu, 4 Feb 2021 20:39:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232564AbhBEBjx (ORCPT ); Thu, 4 Feb 2021 20:39:53 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27B43C0613D6 for ; Thu, 4 Feb 2021 17:39:13 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id e62so5234945yba.5 for ; Thu, 04 Feb 2021 17:39:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:message-id:mime-version:subject:from:to:cc; bh=Ou7Twm7dwyYgMW0x+HwD1Y+xevZetv77gEBdmsc8Q94=; b=GdNa1rPNpTl4tPRjWrN0WbarZpUsCoJ0JD5+A6kbfmK7LL6OyW7mRZjVCwkeIDXwxF +HkfDVVwxtbD98uC2IyJRArEAIwYSbWvMR9MfS/z6vQA9TU7eVY6tyxGfr75wfKutZRi CsOpeFmS8Xb3yNINQqmnPxVs1nFD7jsjm7GDoPXVoCMQb1ZxCdUMOJYDhwKLeuNFBPqy Nq5oiA/kcUmQ+kH518zWlKqesafA17Khqu35kVxHIc9I5lIGka7suX/V3IxN59UqLEP6 f4Lht+1brN6UijoQZO82LCpzq85RyvhA6hEfelDJDwopdaUhH5LMkM4c6tNx6BB7CRE4 74fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:message-id:mime-version:subject:from :to:cc; bh=Ou7Twm7dwyYgMW0x+HwD1Y+xevZetv77gEBdmsc8Q94=; b=jyrmCMRDiTGLmtMMRyg5aPyfUrx3+JZkcqr7glrq7Qif1QQKSQJL2PU7qv9oKWs7P9 MDQ1npeWjsgfocLgshKcib5X8g5CwF5HyijUtT1qlBHnIg9OZSeBpYi80/d7xDVer/e6 9hGDX7O2YXtL2YaoIcWJgMeq3q4e6dJ545MTbvAP/gZBLk/8kXurNnyYqffg5ev9QfGa DrjqPv3im2imCLbfuBKXhWY0+iAPJf5E8hpSmLnGA4HhoSqiIbYin8Yxb2yOCtqhHMDa /Itkf6KB7F2OvC+Opx+uz0bf9J1P6B41IZKhpY7RInsydJ5d5FpgOy1Q+nGXyn1kytmm Etpw== X-Gm-Message-State: AOAM531v1SzJN3Cw+yAZk79YIGIPY4lG8ya8z3QJ+M7Kxp+OhajW5pDw Lj4c0MAmqliZ7hYLIkJqpFf1Yb3jz2HUBEY= Sender: "saravanak via sendgmr" X-Received: from saravanak.san.corp.google.com ([2620:15c:2d:3:8475:2f1d:e8b4:f65a]) (user=saravanak job=sendgmr) by 2002:a25:2f55:: with SMTP id v82mr2711812ybv.481.1612489152344; Thu, 04 Feb 2021 17:39:12 -0800 (PST) Date: Thu, 4 Feb 2021 17:38:46 -0800 Message-Id: <20210205013847.1736929-1-saravanak@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.30.0.365.g02bc693789-goog Subject: [PATCH v3] ARM: imx: avic: Convert to using IRQCHIP_DECLARE From: Saravana Kannan To: Russell King , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Saravana Kannan Cc: Martin Kaiser , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Using IRQCHIP_DECLARE lets fw_devlink know that it should not wait for these interrupt controllers to be populated as struct devices. Without this change, fw_devlink=on will make the consumers of these interrupt controllers wait for the struct device to be added and thereby block the consumers' probes forever. Converting to IRQCHIP_DECLARE addresses boot issues on imx25 with fw_devlink=on that were reported by Martin. This also removes a lot of boilerplate code. Fixes: e590474768f1 ("driver core: Set fw_devlink=on by default") Reported-by: Martin Kaiser Signed-off-by: Saravana Kannan Tested-by: Martin Kaiser --- v1 -> v2: - Fixed compatible string - Added Tested-by v2 -> v3: - Improved commit text arch/arm/mach-imx/avic.c | 16 +++++++++++++++- arch/arm/mach-imx/common.h | 1 - arch/arm/mach-imx/mach-imx1.c | 11 ----------- arch/arm/mach-imx/mach-imx25.c | 12 ------------ arch/arm/mach-imx/mach-imx27.c | 12 ------------ arch/arm/mach-imx/mach-imx31.c | 1 - arch/arm/mach-imx/mach-imx35.c | 1 - arch/arm/mach-imx/mm-imx3.c | 24 ------------------------ 8 files changed, 15 insertions(+), 63 deletions(-) diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c index 322caa21bcb3..21bce4049cec 100644 --- a/arch/arm/mach-imx/avic.c +++ b/arch/arm/mach-imx/avic.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -162,7 +163,7 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs) * interrupts. It registers the interrupt enable and disable functions * to the kernel for each interrupt source. */ -void __init mxc_init_irq(void __iomem *irqbase) +static void __init mxc_init_irq(void __iomem *irqbase) { struct device_node *np; int irq_base; @@ -220,3 +221,16 @@ void __init mxc_init_irq(void __iomem *irqbase) printk(KERN_INFO "MXC IRQ initialized\n"); } + +static int __init imx_avic_init(struct device_node *node, + struct device_node *parent) +{ + void __iomem *avic_base; + + avic_base = of_iomap(node, 0); + BUG_ON(!avic_base); + mxc_init_irq(avic_base); + return 0; +} + +IRQCHIP_DECLARE(imx_avic, "fsl,avic", imx_avic_init); diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 2d76e2c6c99e..e988b0978a42 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -22,7 +22,6 @@ void mx35_map_io(void); void imx21_init_early(void); void imx31_init_early(void); void imx35_init_early(void); -void mxc_init_irq(void __iomem *); void mx31_init_irq(void); void mx35_init_irq(void); void mxc_set_cpu_type(unsigned int type); diff --git a/arch/arm/mach-imx/mach-imx1.c b/arch/arm/mach-imx/mach-imx1.c index 32df3b8012f9..8eca92d66a2e 100644 --- a/arch/arm/mach-imx/mach-imx1.c +++ b/arch/arm/mach-imx/mach-imx1.c @@ -17,16 +17,6 @@ static void __init imx1_init_early(void) mxc_set_cpu_type(MXC_CPU_MX1); } -static void __init imx1_init_irq(void) -{ - void __iomem *avic_addr; - - avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K); - WARN_ON(!avic_addr); - - mxc_init_irq(avic_addr); -} - static const char * const imx1_dt_board_compat[] __initconst = { "fsl,imx1", NULL @@ -34,7 +24,6 @@ static const char * const imx1_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)") .init_early = imx1_init_early, - .init_irq = imx1_init_irq, .dt_compat = imx1_dt_board_compat, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx25.c b/arch/arm/mach-imx/mach-imx25.c index 95de48a1aa7d..51927bd08aef 100644 --- a/arch/arm/mach-imx/mach-imx25.c +++ b/arch/arm/mach-imx/mach-imx25.c @@ -22,17 +22,6 @@ static void __init imx25_dt_init(void) imx_aips_allow_unprivileged_access("fsl,imx25-aips"); } -static void __init mx25_init_irq(void) -{ - struct device_node *np; - void __iomem *avic_base; - - np = of_find_compatible_node(NULL, NULL, "fsl,avic"); - avic_base = of_iomap(np, 0); - BUG_ON(!avic_base); - mxc_init_irq(avic_base); -} - static const char * const imx25_dt_board_compat[] __initconst = { "fsl,imx25", NULL @@ -42,6 +31,5 @@ DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)") .init_early = imx25_init_early, .init_machine = imx25_dt_init, .init_late = imx25_pm_init, - .init_irq = mx25_init_irq, .dt_compat = imx25_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx27.c b/arch/arm/mach-imx/mach-imx27.c index 262422a9c196..e325c9468105 100644 --- a/arch/arm/mach-imx/mach-imx27.c +++ b/arch/arm/mach-imx/mach-imx27.c @@ -56,17 +56,6 @@ static void __init imx27_init_early(void) mxc_set_cpu_type(MXC_CPU_MX27); } -static void __init mx27_init_irq(void) -{ - void __iomem *avic_base; - struct device_node *np; - - np = of_find_compatible_node(NULL, NULL, "fsl,avic"); - avic_base = of_iomap(np, 0); - BUG_ON(!avic_base); - mxc_init_irq(avic_base); -} - static const char * const imx27_dt_board_compat[] __initconst = { "fsl,imx27", NULL @@ -75,7 +64,6 @@ static const char * const imx27_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)") .map_io = mx27_map_io, .init_early = imx27_init_early, - .init_irq = mx27_init_irq, .init_late = imx27_pm_init, .dt_compat = imx27_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx31.c b/arch/arm/mach-imx/mach-imx31.c index dc69dfe600df..e9a1092b6093 100644 --- a/arch/arm/mach-imx/mach-imx31.c +++ b/arch/arm/mach-imx/mach-imx31.c @@ -14,6 +14,5 @@ static const char * const imx31_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)") .map_io = mx31_map_io, .init_early = imx31_init_early, - .init_irq = mx31_init_irq, .dt_compat = imx31_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx35.c b/arch/arm/mach-imx/mach-imx35.c index ec5c3068715c..0fc08218b77d 100644 --- a/arch/arm/mach-imx/mach-imx35.c +++ b/arch/arm/mach-imx/mach-imx35.c @@ -27,6 +27,5 @@ DT_MACHINE_START(IMX35_DT, "Freescale i.MX35 (Device Tree Support)") .l2c_aux_mask = ~0, .map_io = mx35_map_io, .init_early = imx35_init_early, - .init_irq = mx35_init_irq, .dt_compat = imx35_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 5056438e5b42..28db97289ee8 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -109,18 +109,6 @@ void __init imx31_init_early(void) mx3_ccm_base = of_iomap(np, 0); BUG_ON(!mx3_ccm_base); } - -void __init mx31_init_irq(void) -{ - void __iomem *avic_base; - struct device_node *np; - - np = of_find_compatible_node(NULL, NULL, "fsl,imx31-avic"); - avic_base = of_iomap(np, 0); - BUG_ON(!avic_base); - - mxc_init_irq(avic_base); -} #endif /* ifdef CONFIG_SOC_IMX31 */ #ifdef CONFIG_SOC_IMX35 @@ -158,16 +146,4 @@ void __init imx35_init_early(void) mx3_ccm_base = of_iomap(np, 0); BUG_ON(!mx3_ccm_base); } - -void __init mx35_init_irq(void) -{ - void __iomem *avic_base; - struct device_node *np; - - np = of_find_compatible_node(NULL, NULL, "fsl,imx35-avic"); - avic_base = of_iomap(np, 0); - BUG_ON(!avic_base); - - mxc_init_irq(avic_base); -} #endif /* ifdef CONFIG_SOC_IMX35 */ -- 2.30.0.365.g02bc693789-goog