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From:   Mike Leach <mike.leach@linaro.org>
Date:   Fri, 5 Feb 2021 11:47:04 +0000
Message-ID: <CAJ9a7VjVSZGR8MJQYiKAc_OcV_BmY1YiXqSaGRi=UPkj=iCUew@mail.gmail.com>
Subject: Re: [PATCH v2 3/7] perf cs-etm: Fix bitmap for option
To:     Leo Yan <leo.yan@linaro.org>
Cc:     Arnaldo Carvalho de Melo <acme@kernel.org>,
        Mathieu Poirier <mathieu.poirier@linaro.org>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Jonathan Corbet <corbet@lwn.net>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        John Garry <john.garry@huawei.com>,
        Will Deacon <will@kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Jiri Olsa <jolsa@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        Daniel Kiss <Daniel.Kiss@arm.com>,
        Denis Nikitin <denik@chromium.org>,
        Coresight ML <coresight@lists.linaro.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        "open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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On Tue, 2 Feb 2021 at 16:39, Leo Yan <leo.yan@linaro.org> wrote:
>
> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> When set option with macros ETM_OPT_CTXTID and ETM_OPT_TS, it wrongly
> takes these two values (14 and 28 prespectively) as bit masks, but
> actually both are the offset for bits.  But this doesn't lead to
> further failure due to the AND logic operation will be always true for
> ETM_OPT_CTXTID / ETM_OPT_TS.
>
> This patch defines new independent macros (rather than using the
> "config" bits) for requesting the "contextid" and "timestamp" for
> cs_etm_set_option().
>
> [leoy: Extract the change as a separate patch for easier review]
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> ---
>  tools/perf/arch/arm/util/cs-etm.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
> index bd446aba64f7..c25c878fd06c 100644
> --- a/tools/perf/arch/arm/util/cs-etm.c
> +++ b/tools/perf/arch/arm/util/cs-etm.c
> @@ -156,6 +156,10 @@ static int cs_etm_set_timestamp(struct auxtrace_record *itr,
>         return err;
>  }
>
> +#define ETM_SET_OPT_CTXTID     (1 << 0)
> +#define ETM_SET_OPT_TS         (1 << 1)
> +#define ETM_SET_OPT_MASK       (ETM_SET_OPT_CTXTID | ETM_SET_OPT_TS)
> +
>  static int cs_etm_set_option(struct auxtrace_record *itr,
>                              struct evsel *evsel, u32 option)
>  {
> @@ -169,17 +173,17 @@ static int cs_etm_set_option(struct auxtrace_record *itr,
>                     !cpu_map__has(online_cpus, i))
>                         continue;
>
> -               if (option & ETM_OPT_CTXTID) {
> +               if (option & ETM_SET_OPT_CTXTID) {
>                         err = cs_etm_set_context_id(itr, evsel, i);
>                         if (err)
>                                 goto out;
>                 }
> -               if (option & ETM_OPT_TS) {
> +               if (option & ETM_SET_OPT_TS) {
>                         err = cs_etm_set_timestamp(itr, evsel, i);
>                         if (err)
>                                 goto out;
>                 }
> -               if (option & ~(ETM_OPT_CTXTID | ETM_OPT_TS))
> +               if (option & ~(ETM_SET_OPT_MASK))
>                         /* Nothing else is currently supported */
>                         goto out;
>         }
> @@ -406,7 +410,7 @@ static int cs_etm_recording_options(struct auxtrace_record *itr,
>                 evsel__set_sample_bit(cs_etm_evsel, CPU);
>
>                 err = cs_etm_set_option(itr, cs_etm_evsel,
> -                                       ETM_OPT_CTXTID | ETM_OPT_TS);
> +                                       ETM_SET_OPT_CTXTID | ETM_SET_OPT_TS);
>                 if (err)
>                         goto out;
>         }
> --
> 2.25.1
>

Reivewed-by: Mike Leach <mike.leach@linaro.org>
-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK