Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp2314360pxb; Fri, 5 Feb 2021 14:49:32 -0800 (PST) X-Google-Smtp-Source: ABdhPJxMsJaWor+uUuVuQ+Ef+of9do6i+hU/r86sLEJ1nVYahCu/4tSF0EMeNJF8oxd+wlUEyqzl X-Received: by 2002:a05:6402:202d:: with SMTP id ay13mr5634269edb.335.1612565372659; Fri, 05 Feb 2021 14:49:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612565372; cv=none; d=google.com; s=arc-20160816; b=HZwDjxcjMJIoly+Z4hjBjc92tKqHmdcd/IDX5pf8Ss72KXiVQc7n8y/Wi6uikBW6rU PSJFdTMHQETCiTJfzcIdUGBqssB2YM7JQtkv3i0BEnG0HMDcG1T9wauEDNKUgSevNhXW rw/nAmSxiPDmFH5xEfhZipMg1eGtfYOSGiCNLPDljo1beUzSdqBoKFUH7gM38zFhQ2KJ 2hC1E5Oec22E1GSGsbFFnIf2M4/DWtFhUSVK38WjuNmZo89PSdZrj8cAaNY7EiwXDxye MQT1Cj/oZzoYm+BR/LdvaJ2JdaFu/FUAfQVv5AXQAYHS4fiz8w5CHgR69RG+xNCiHSxg P0Iw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:ironport-sdr :ironport-sdr; bh=sjAKxLyz0DfHWDzVWoGBV/ujNGfh76aJgrebNUeNyl4=; b=j7xS3GObdTgCrT6DFcRIy7HUS5HHMLj/H5rOsgDFDz2cZupNrw2J/aguppM4ASiGC2 7OwwxvPIddmZ0rFfWCwmtZ1lIiG6oRmfhqXMsxd/sIStM5omgI9OuY12Q9nNWuUGRUIl CftYog3ooYFFN2gCtP+zbnfEoeJIOtllem51F2LkOMcLK2nGWl9cXAqmi0/eEDf9mEaI sViHqu1hPnZHcWzrw/QvmfOMCXk2EV0tDfTdOJRPeojEOUqMkTTDJRhj+I5IpK3R18sp n8lPwAizCiAJNliSSW2JjxL+9I/aQcYiTa4GZh7Cfkqn1Wy+t1qbAWy0OstjYcXf3u1r ZsQw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id df22si6254579edb.163.2021.02.05.14.49.07; Fri, 05 Feb 2021 14:49:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232929AbhBEWpn (ORCPT + 99 others); Fri, 5 Feb 2021 17:45:43 -0500 Received: from mga01.intel.com ([192.55.52.88]:9160 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229562AbhBEOwL (ORCPT ); Fri, 5 Feb 2021 09:52:11 -0500 IronPort-SDR: gqNaeb1Bo2cqaaN72sb2k6Fi1tA6p9QQDOq10UJ4d5z0sZePMeVZPFHpJqgu1yOHL2vxe9HEr9 bZDtpQzcvbRw== X-IronPort-AV: E=McAfee;i="6000,8403,9885"; a="200458140" X-IronPort-AV: E=Sophos;i="5.81,155,1610438400"; d="scan'208";a="200458140" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2021 08:01:32 -0800 IronPort-SDR: XM0B3MmmoWzhRiAeh0KlBcUrZDjGoqkkDfHi61Otf6dih0ahbZZXPqcTwXdkH+DME12WkBAR21 aHWaSFFWEt/w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,155,1610438400"; d="scan'208";a="508578982" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 05 Feb 2021 08:01:28 -0800 Received: by black.fi.intel.com (Postfix, from userid 1000) id D6D3B184; Fri, 5 Feb 2021 18:01:27 +0200 (EET) Date: Fri, 5 Feb 2021 19:01:27 +0300 From: "Kirill A. Shutemov" To: Peter Zijlstra Cc: Dave Hansen , Andy Lutomirski , x86@kernel.org, Andrey Ryabinin , Alexander Potapenko , Dmitry Vyukov , Catalin Marinas , Will Deacon , "H . J . Lu" , Andi Kleen , linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [RFC 0/9] Linear Address Masking enabling Message-ID: <20210205160127.ylcdd6bbve6q2bbk@black.fi.intel.com> References: <20210205151631.43511-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 05, 2021 at 04:49:05PM +0100, Peter Zijlstra wrote: > On Fri, Feb 05, 2021 at 06:16:20PM +0300, Kirill A. Shutemov wrote: > > The feature competes for bits with 5-level paging: LAM_U48 makes it > > impossible to map anything about 47-bits. The patchset made these > > capability mutually exclusive: whatever used first wins. LAM_U57 can be > > combined with mappings above 47-bits. > > And I suppose we still can't switch between 4 and 5 level at runtime, > using a CR3 bit? No. And I can't imagine how would it work with 5-level on kernel side. -- Kirill A. Shutemov