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Subject: Re: [PATCH v5 0/4] perf vendor events: Support PMU events for A64FX
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From:   John Garry <john.garry@huawei.com>
Message-ID: <5b507e0e-0887-ee86-4fcd-06567d3f370b@huawei.com>
Date:   Mon, 8 Feb 2021 08:57:30 +0000
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On 08/02/2021 01:53, nakamur'd a.shun@fujitsu.com wrote:
> Hi, John
> 
>>>> Apart from that, I think that we're a bit uncertain about patch 3/4
>>> What are your concerns?
>>> I think it's okay for perf to read a new event code with a number at the
>> beginning.
>>
>> The impact of this fix is on {name} and later rules.
>> parse_events.l uses {name} only in one place.
>> The only rule defined after {name} is {name_tag}.
>>
>> I think the point of current fix is that the rules defined after {name} are not
>> misrecognize and the syntax is not broken.
>> {name_tag} starts with ', but {name} does not contain'.
>> Therefore, the corrected {name} does not misrecognize the {name_tag}, and I
>> think there is no problem.
> Do you have any advice?

Hi,

So my series is now on remotes/origin/tmp.perf/core in Arnaldo's acme 
git, so you could resend against that.

https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git

Or again, put my series on perf/core and send against that.

As for patch 3/4, firstly I'd say that it is not a 'fix'. As well, 
please ensure it causes no regression on x86 or arm64. So like "perf 
list" output is same as before (with just that change), and also test 
some same perf events and metrics (x86 only) to ensure that they are ok. 
Please also ensure no regression on "perf test".

BTW, please config your mail client for no text encoding.

Thanks,
John