Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
IronPort-SDR: zaROYwu4Tjud2qRYhndUwY9GbH0xUA6x+FYIZCpTrOJT3y9ZHwuTbLo+LQXPfzOp6iTP3OhM/8
 PoobNIqEGCbktQFiduKH7Ff0u2NY0qA0dL6eWIL+4SMdC4AmTmvgy3rRvatoRWeu3VFU+X9897
 CQZcFUiSDiZspB2vX1F3rC5lTqq46Cukj+FJTy245+IESXqYJ8CaWrTHcuP2G1GQ8XfO1frE0n
 5ua8ldCv7UwU3HFRrQBAF0OYjTxhggj9MvAzMHUoGFWVMvumPnDNtjyUHOjeh8b7YBP5AzZ+YG
 xjg=
Message-ID: <23616bd06996c1df9480b879d804220269143f44.camel@microchip.com>
Subject: Re: [PATCH v4 3/3] arm64: dts: reset: add microchip sparx5 switch
 reset driver
From:   Steen Hegelund <steen.hegelund@microchip.com>
To:     Rob Herring <robh@kernel.org>
CC:     Philipp Zabel <p.zabel@pengutronix.de>,
        Andrew Lunn <andrew@lunn.ch>,
        Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
        "Alexandre Belloni" <alexandre.belloni@bootlin.com>,
        Gregory Clement <gregory.clement@bootlin.com>,
        <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>
Date:   Mon, 8 Feb 2021 14:20:30 +0100
In-Reply-To: <20210205223526.GA3869001@robh.at.kernel.org>
References: <20210120081921.3315847-1-steen.hegelund@microchip.com>
         <20210120081921.3315847-4-steen.hegelund@microchip.com>
         <20210205223526.GA3869001@robh.at.kernel.org>
Content-Type: text/plain; charset="UTF-8"
User-Agent: Evolution 3.38.3 
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Hi Rob,

On Fri, 2021-02-05 at 16:35 -0600, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> On Wed, Jan 20, 2021 at 09:19:21AM +0100, Steen Hegelund wrote:
> > This provides reset driver support for the Microchip Sparx5 PCB134
> > and
> > PCB135 reference boards.
> 
> This isn't a compatible change. You need an explanation why that's
> okay
> if that's intended.

I am not entirely sure that I get your point.

The change (adding the reset driver) is new, and it is optional (but
strongly recommended) for the  clients to use it, so will this be a
incompatible change?

I can certainly add a an explanation.  Would that be needed here in the
bindings, or where do you suggest?


> 
> > 
> > Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
> > ---
> >  arch/arm64/boot/dts/microchip/sparx5.dtsi | 14 +++++++++++---
> >  1 file changed, 11 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
> > b/arch/arm64/boot/dts/microchip/sparx5.dtsi
> > index 380281f312d8..4edbb9fcdce0 100644
> > --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
> > +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
> > @@ -132,9 +132,17 @@ mux: mux-controller {
> >                       };
> >               };
> > 
> > -             reset@611010008 {
> > -                     compatible = "microchip,sparx5-chip-reset";
> > -                     reg = <0x6 0x11010008 0x4>;
> > +             gcb_ctrl: syscon@611010000 {
> > +                     compatible = "microchip,sparx5-gcb-syscon",
> > "syscon";
> > +                     reg = <0x6 0x11010000 0x10000>;
> > +             };
> > +
> > +             reset: reset-controller@0 {
> > +                     compatible = "microchip,sparx5-switch-reset";
> > +                     reg = <0x6 0x0 0x0>;
> 
> Your register length is 0?
> 
> > +                     #reset-cells = <1>;
> > +                     cpu-syscon = <&cpu_ctrl>;
> 
> Can't you accomplish the same thing adding these to
> "microchip,sparx5-chip-reset"? Or possibly as a child node.
> 
> Define nodes based on h/w blocks, not as containers of things you
> happen
> to want for some driver.
> 
> > +                     gcb-syscon = <&gcb_ctrl>;
> >               };
> > 
> >               uart0: serial@600100000 {
> > --
> > 2.29.2
> > 

Thanks for your comments

BR
Steen