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[23.128.96.18]) by mx.google.com with ESMTP id sa4si11500970ejb.288.2021.02.08.11.17.04; Mon, 08 Feb 2021 11:17:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236052AbhBHTOi (ORCPT + 99 others); Mon, 8 Feb 2021 14:14:38 -0500 Received: from mail.baikalelectronics.com ([87.245.175.226]:58176 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234985AbhBHR4h (ORCPT ); Mon, 8 Feb 2021 12:56:37 -0500 Date: Mon, 8 Feb 2021 20:44:41 +0300 From: Serge Semin To: Andrew Lunn CC: Serge Semin , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Joao Pinto , Jose Abreu , Heiner Kallweit , Russell King , Alexey Malahov , Pavel Parkhomenko , Vyacheslav Mitrofanov , Maxime Coquelin , , , , Subject: Re: [PATCH 01/20] net: phy: realtek: Fix events detection failure in LPI mode Message-ID: <20210208174441.z4nnugkaadhmgnum@mobilestation> References: <20210208140341.9271-1-Sergey.Semin@baikalelectronics.ru> <20210208140341.9271-2-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 08, 2021 at 04:27:36PM +0100, Andrew Lunn wrote: > On Mon, Feb 08, 2021 at 05:03:22PM +0300, Serge Semin wrote: > > It has been noticed that RTL8211E PHY stops detecting and reporting events > > when EEE is successfully advertised and RXC stopping in LPI is enabled. > > The freeze happens right after 3.0.10 bit (PC1R "Clock Stop Enable" > > register) is set. At the same time LED2 stops blinking as if EEE mode has > > been disabled. Notably the network traffic still flows through the PHY > > with no obvious problem. Anyway if any MDIO read procedure is performed > > after the "RXC stop in LPI" mode is enabled PHY gets to be unfrozen, LED2 > > starts blinking and PHY interrupts happens again. The problem has been > > noticed on RTL8211E PHY working together with DW GMAC 3.73a MAC and > > reporting its event via a dedicated IRQ signal. (Obviously the problem has > > been unnoticed in the polling mode, since it gets naturally fixed by the > > periodic MDIO read procedure from the PHY status register - BMSR.) > > > > In order to fix that problem we suggest to locally re-implement the MMD > > write method for RTL8211E PHY and perform a dummy read right after the > > PC1R register is accessed to enable the RXC stopping in LPI mode. > > Hi Serge > > Is this listed in an Errata from Realtek? Hi Andrew, I honestly tried to find any doc with a glimpse of errata for RTL8211E PHY, but with no luck. Official datasheet didn't have any info regarding possible hw bugs too. Thus I had no choice but to find a fix of the problem myself. It took me some time to figure out why the events weren't reported after the very first link setup (turned out only a full HW reset clears the PC1R.10 bit state). I thought it could have been connected with some sleep/idle/power-safe mode. So I disabled the EEE initialization in the STMMAC driver. It worked. Then I left the EEE mode enabled, but called the phy_init_eee(phy, 0) method with "clk_stop_enable==0", so PHY wouldn't stop RXC in LPI mode. And it wonderfully worked. Then I started to dig in from another side. I left "RXC disable in LPI" mode enabled and tried to figure out what was going on with the PHY when it stopped reporting events just by reading from its CSR using phytool utility. It was curious to discover that any attempt to read from any PHY register caused the problem disappearance (LED2 started blinking, events got to be reported). Since I did nothing but a mere reading from a random even EEE-unrelated register I inferred that the problem must be in some HW/PHY bug. That's how I've got to the patch introduced here. If you have any better idea what could be a reason of that weird behavior I'd be glad to test it out on my device. -Sergey > > Andrew