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[23.128.96.18]) by mx.google.com with ESMTP id g7si11518868ejh.224.2021.02.08.13.23.39; Mon, 08 Feb 2021 13:24:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@mg.codeaurora.org header.s=smtp header.b=VCsZymbu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236357AbhBHVWP (ORCPT + 99 others); Mon, 8 Feb 2021 16:22:15 -0500 Received: from mail29.static.mailgun.info ([104.130.122.29]:56311 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236703AbhBHUME (ORCPT ); Mon, 8 Feb 2021 15:12:04 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1612815104; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=u8iIJehkth8Jk+VBQwZ5ZjLbDDng2RrkWNfl+aRo0Gw=; b=VCsZymbuwYJ0RmGqwAmf8TWdOOZQxx64BvliV12PmB447xdVHfxcRumUh25WrbDTTRKDGX29 QN/CPV75OyOdaf7szOPTeYow7CRUkwwsUFwC46E7RVV8wV0pYXTGxdCnxSNwJGTpgKZzO2Lz RQ5bzEucz6XBNJu3s1SU1Pjov8k= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n04.prod.us-west-2.postgun.com with SMTP id 60219ae434db06ef798f2c90 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 08 Feb 2021 20:11:16 GMT Sender: bbhatt=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 14747C433C6; Mon, 8 Feb 2021 20:11:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00,SPF_FAIL, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from malabar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3A10BC43465; Mon, 8 Feb 2021 20:11:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3A10BC43465 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, carl.yin@quectel.com, naveen.kumar@quectel.com, Bhaumik Bhatt Subject: [PATCH v3 3/3] bus: mhi: core: Process execution environment changes serially Date: Mon, 8 Feb 2021 12:11:02 -0800 Message-Id: <1612815062-4738-4-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612815062-4738-1-git-send-email-bbhatt@codeaurora.org> References: <1612815062-4738-1-git-send-email-bbhatt@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In current design, whenever the BHI interrupt is fired, the execution environment is updated. This can cause race conditions and impede any ongoing power up/down processing. For example, if a power down is in progress, MHI host updates the execution environment to a local "disabled" state. If a BHI interrupt fires later, the value gets replaced with one from the BHI EE register. This impacts the controller as it does not expect multiple RDDM execution environment change status callbacks as an example. Another issue would be that the device can enter mission mode and the execution environment is updated, while device creation for SBL channels is still going on due to slower PM state worker thread run, leading to multiple attempts at opening the same IPCR channel. Ensure that EE changes are handled only from appropriate places and occur one after another and handle only PBL or RDDM EE changes as critical events directly from the interrupt handler. This also makes sure that we use the correct execution environment to notify the controller driver when the device resets to one of the PBL execution environments. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/main.c | 14 ++++++++------ drivers/bus/mhi/core/pm.c | 5 +++-- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index a73ca03..69401ab 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -423,7 +423,7 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) struct device *dev = &mhi_cntrl->mhi_dev->dev; enum mhi_state state = MHI_STATE_MAX; enum mhi_pm_state pm_state = 0; - enum mhi_ee_type ee = 0; + enum mhi_ee_type ee = MHI_EE_MAX; write_lock_irq(&mhi_cntrl->pm_lock); if (!MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) { @@ -432,8 +432,7 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) } state = mhi_get_mhi_state(mhi_cntrl); - ee = mhi_cntrl->ee; - mhi_cntrl->ee = mhi_get_exec_env(mhi_cntrl); + ee = mhi_get_exec_env(mhi_cntrl); dev_dbg(dev, "local ee:%s device ee:%s dev_state:%s\n", TO_MHI_EXEC_STR(mhi_cntrl->ee), TO_MHI_EXEC_STR(ee), TO_MHI_STATE_STR(state)); @@ -451,8 +450,9 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) if (!mhi_is_active(mhi_cntrl)) goto exit_intvec; - if (mhi_cntrl->ee == MHI_EE_RDDM && mhi_cntrl->ee != ee) { + if (ee == MHI_EE_RDDM && mhi_cntrl->ee != MHI_EE_RDDM) { mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_EE_RDDM); + mhi_cntrl->ee = ee; wake_up_all(&mhi_cntrl->state_event); } goto exit_intvec; @@ -462,10 +462,12 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) wake_up_all(&mhi_cntrl->state_event); /* For fatal errors, we let controller decide next step */ - if (MHI_IN_PBL(ee)) + if (MHI_IN_PBL(ee)) { mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_FATAL_ERROR); - else + mhi_cntrl->ee = ee; + } else { mhi_pm_sys_err_handler(mhi_cntrl); + } } exit_intvec: diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index 44aa7eb..c870fa8 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -384,14 +384,15 @@ static int mhi_pm_mission_mode_transition(struct mhi_controller *mhi_cntrl) write_lock_irq(&mhi_cntrl->pm_lock); if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) - mhi_cntrl->ee = mhi_get_exec_env(mhi_cntrl); + ee = mhi_get_exec_env(mhi_cntrl); - if (!MHI_IN_MISSION_MODE(mhi_cntrl->ee)) { + if (!MHI_IN_MISSION_MODE(ee)) { mhi_cntrl->pm_state = MHI_PM_LD_ERR_FATAL_DETECT; write_unlock_irq(&mhi_cntrl->pm_lock); wake_up_all(&mhi_cntrl->state_event); return -EIO; } + mhi_cntrl->ee = ee; write_unlock_irq(&mhi_cntrl->pm_lock); wake_up_all(&mhi_cntrl->state_event); -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project