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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id o4sm164662pjs.57.2021.02.08.12.50.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Feb 2021 12:50:11 -0800 (PST) Date: Mon, 8 Feb 2021 13:50:09 -0700 From: Mathieu Poirier To: Leo Yan Cc: Arnaldo Carvalho de Melo , Suzuki K Poulose , Mike Leach , Jonathan Corbet , John Garry , Will Deacon , Peter Zijlstra , Ingo Molnar , Mark Rutland , Jiri Olsa , Namhyung Kim , Daniel Kiss , Denis Nikitin , Al Grant , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 8/8] Documentation: coresight: Add PID tracing description Message-ID: <20210208205009.GF2077938@xps15> References: <20210206150833.42120-1-leo.yan@linaro.org> <20210206150833.42120-9-leo.yan@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210206150833.42120-9-leo.yan@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Feb 06, 2021 at 11:08:33PM +0800, Leo Yan wrote: > After support the PID tracing for the kernel in EL1 or EL2, the usage > gets more complicated. > > This patch gives description for the PMU formats of contextID configs, > this can help users to understand how to control the knobs for PID > tracing when the kernel is in different ELs. > > Signed-off-by: Leo Yan As I indicated I have picked up the kernel patches in this set and there should be a new patchset sent to Arnaldo. The only thing left is this patch and I will give time to Mike and Suzuki to look at it before I add it to my tree. Thanks, Mathieu > --- > Documentation/trace/coresight/coresight.rst | 32 +++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst > index 0b73acb44efa..169749efd8d1 100644 > --- a/Documentation/trace/coresight/coresight.rst > +++ b/Documentation/trace/coresight/coresight.rst > @@ -512,6 +512,38 @@ The --itrace option controls the type and frequency of synthesized events > Note that only 64-bit programs are currently supported - further work is > required to support instruction decode of 32-bit Arm programs. > > +2.2) Tracing PID > + > +The kernel can be built to write the PID value into the PE ContextID registers. > +For a kernel running at EL1, the PID is stored in CONTEXTIDR_EL1. A PE may > +implement Arm Virtualization Host Extensions (VHE), which the kernel can > +run at EL2 as a virtualisation host; in this case, the PID value is stored in > +CONTEXTIDR_EL2. > + > +perf provides PMU formats that program the ETM to insert these values into the > +trace data; the PMU formats are defined as below: > + > + "contextid1": Available on both EL1 kernel and EL2 kernel. When the > + kernel is running at EL1, "contextid1" enables the PID > + tracing; when the kernel is running at EL2, this enables > + tracing the PID of guest applications. > + > + "contextid2": Only usable when the kernel is running at EL2. When > + selected, enables PID tracing on EL2 kernel. > + > + "contextid": Will be an alias for the option that enables PID > + tracing. I.e, > + contextid == contextid1, on EL1 kernel. > + contextid == contextid2, on EL2 kernel. > + > +perf will always enable PID tracing at the relevant EL, this is accomplished by > +automatically enable the "contextid" config - but for EL2 it is possible to make > +specific adjustments using configs "contextid1" and "contextid2", E.g. if a user > +wants to trace PIDs for both host and guest, the two configs "contextid1" and > +"contextid2" can be set at the same time: > + > + perf record -e cs_etm/contextid1,contextid2/u -- vm > + > > Generating coverage files for Feedback Directed Optimization: AutoFDO > --------------------------------------------------------------------- > -- > 2.25.1 >