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Date:   Tue, 09 Feb 2021 10:36:11 +0800
From:   "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To:     "Tiezhu Yang" <yangtiezhu@loongson.cn>,
        "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>
Cc:     "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
        linux-kernel@vger.kernel.org, "Xuefeng Li" <lixuefeng@loongson.cn>
Subject: =?UTF-8?Q?Re:_[PATCH]_MIPS:_Make_check_condition_for_SDBBP_consistent_wi?=
 =?UTF-8?Q?th_EJTAG_spec?=
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On Tue, Feb 9, 2021, at 12:32 AM, Jiaxun Yang wrote:
> 
> 
> On Mon, Feb 8, 2021, at 9:14 PM, Tiezhu Yang wrote:
> > According to MIPS EJTAG Specification [1], a Debug Breakpoint
> > exception occurs when an SDBBP instruction is executed, the
> > CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception
> > occurred, just check bit DBp for SDBBP is more accurate.
> > 
> > [1] http://www.t-es-t.hu/download/mips/md00047f.pdf
> > 
> > Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
> > ---
> >  arch/mips/kernel/genex.S | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
> > index bcce32a..6336826 100644
> > --- a/arch/mips/kernel/genex.S
> > +++ b/arch/mips/kernel/genex.S
> > @@ -349,8 +349,8 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
> >  	MTC0	k0, CP0_DESAVE
> >  	mfc0	k0, CP0_DEBUG
> >  
> > -	sll	k0, k0, 30	# Check for SDBBP.
> > -	bgez	k0, ejtag_return
> > +	andi	k0, k0, 0x2	# Check for SDBBP.
> > +	beqz	k0, ejtag_return
> 
> You'd better define a marco for it to prevent further confusion.
> 
> Btw I'm curious about how do kernel receive EJTAG exception?
> In my understanding there are only two possible EJTAG exception vectors,
> 0xbfc00480 and DSEG one. Both of them are reachable by kernel.
^ not

> How do this piece of code work?
> 
> Thanks.
> 
> - Jiaxun
> 
> >  
> >  #ifdef CONFIG_SMP
> >  1:	PTR_LA	k0, ejtag_debug_buffer_spinlock
> > -- 
> > 2.1.0
> > 
> >
> 
> -- 
> - Jiaxun
>

-- 
- Jiaxun