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Date:   Tue, 09 Feb 2021 17:47:38 +1000
From:   Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [PATCH v5 05/22] powerpc/irq: Add helper to set regs->softe
To:     Benjamin Herrenschmidt <benh@kernel.crashing.org>,
        Christophe Leroy <christophe.leroy@csgroup.eu>,
        Michael Ellerman <mpe@ellerman.id.au>, msuchanek@suse.de,
        Paul Mackerras <paulus@samba.org>
Cc:     linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
References: <cover.1612796617.git.christophe.leroy@csgroup.eu>
        <5f37d1177a751fdbca79df461d283850ca3a34a2.1612796617.git.christophe.leroy@csgroup.eu>
        <1612832745.vhjk6358hf.astroid@bobo.none>
        <258ac0c6-ef40-86d4-2ce4-772cfc4a95e5@csgroup.eu>
In-Reply-To: <258ac0c6-ef40-86d4-2ce4-772cfc4a95e5@csgroup.eu>
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Excerpts from Christophe Leroy's message of February 9, 2021 3:57 pm:
>=20
>=20
> Le 09/02/2021 =C3=A0 02:11, Nicholas Piggin a =C3=A9crit=C2=A0:
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> regs->softe doesn't exist on PPC32.
>>>
>>> Add irq_soft_mask_regs_set_state() helper to set regs->softe.
>>> This helper will void on PPC32.
>>>
>>> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
>>> ---
>>>   arch/powerpc/include/asm/hw_irq.h | 11 +++++++++--
>>>   1 file changed, 9 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/a=
sm/hw_irq.h
>>> index 614957f74cee..ed0c3b049dfd 100644
>>> --- a/arch/powerpc/include/asm/hw_irq.h
>>> +++ b/arch/powerpc/include/asm/hw_irq.h
>>> @@ -38,6 +38,8 @@
>>>   #define PACA_IRQ_MUST_HARD_MASK	(PACA_IRQ_EE)
>>>   #endif
>>>  =20
>>> +#endif /* CONFIG_PPC64 */
>>> +
>>>   /*
>>>    * flags for paca->irq_soft_mask
>>>    */
>>> @@ -46,8 +48,6 @@
>>>   #define IRQS_PMI_DISABLED	2
>>>   #define IRQS_ALL_DISABLED	(IRQS_DISABLED | IRQS_PMI_DISABLED)
>>>  =20
>>> -#endif /* CONFIG_PPC64 */
>>> -
>>>   #ifndef __ASSEMBLY__
>>>  =20
>>>   #ifdef CONFIG_PPC64
>>> @@ -287,6 +287,10 @@ extern void irq_set_pending_from_srr1(unsigned lon=
g srr1);
>>>  =20
>>>   extern void force_external_irq_replay(void);
>>>  =20
>>> +static inline void irq_soft_mask_regs_set_state(struct pt_regs *regs, =
unsigned long val)
>>> +{
>>> +	regs->softe =3D val;
>>> +}
>>>   #else /* CONFIG_PPC64 */
>>>  =20
>>>   static inline unsigned long arch_local_save_flags(void)
>>> @@ -355,6 +359,9 @@ static inline bool arch_irq_disabled_regs(struct pt=
_regs *regs)
>>>  =20
>>>   static inline void may_hard_irq_enable(void) { }
>>>  =20
>>> +static inline void irq_soft_mask_regs_set_state(struct pt_regs *regs, =
unsigned long val)
>>> +{
>>> +}
>>>   #endif /* CONFIG_PPC64 */
>>>  =20
>>>   #define ARCH_IRQ_INIT_FLAGS	IRQ_NOREQUEST
>>=20
>> What I don't like about this where you use it is it kind of pollutes
>> the ppc32 path with this function which is not valid to use.
>>=20
>> I would prefer if you had this purely so it could compile with:
>>=20
>>    if (IS_ENABLED(CONFIG_PPC64)))
>>        irq_soft_mask_regs_set_state(regs, blah);
>>=20
>> And then you could make the ppc32 cause a link error if it did not
>> get eliminated at compile time (e.g., call an undefined function).
>>=20
>> You could do the same with the kuap_ functions to change some ifdefs
>> to IS_ENABLED.
>>=20
>> That's just my preference but if you prefer this way I guess that's
>> okay.
>=20
> I see you didn't change your mind since last April :)
>=20
> I'll see what I can do.

If you have more patches in the works and will do some cleanup passes I=20
don't mind so much.

Thanks,
Nick