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[142.162.115.133]) by smtp.gmail.com with ESMTPSA id p16sm1742656qtq.24.2021.02.10.09.59.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 09:59:14 -0800 (PST) Received: from jgg by mlx with local (Exim 4.94) (envelope-from ) id 1l9tlh-006895-Mz; Wed, 10 Feb 2021 13:59:13 -0400 Date: Wed, 10 Feb 2021 13:59:13 -0400 From: Jason Gunthorpe To: John Hubbard Cc: Daniel Vetter , Alistair Popple , Linux MM , Nouveau Dev , Ben Skeggs , Andrew Morton , Linux Doc Mailing List , Linux Kernel Mailing List , kvm-ppc@vger.kernel.org, dri-devel , Ralph Campbell , Jerome Glisse Subject: Re: [PATCH 0/9] Add support for SVM atomics in Nouveau Message-ID: <20210210175913.GO4718@ziepe.ca> References: <20210209010722.13839-1-apopple@nvidia.com> <3426910.QXTomnrpqD@nvdebian> <57fe0deb-8bf6-d3ee-3545-11109e946528@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <57fe0deb-8bf6-d3ee-3545-11109e946528@nvidia.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 09, 2021 at 12:53:27PM -0800, John Hubbard wrote: > This direction sounds at least...possible. Using MMU notifiers instead of pins > is definitely appealing. I'm not quite clear on the callback idea above, but > overall it seems like taking advantage of the ZONE_DEVICE tracking of pages > (without having to put anything additional in each struct page), could work. It isn't the ZONE_DEVICE page that needs to be tracked. Really what you want to do here is leave the CPU page in the VMA and the page tables where it started and deny CPU access to the page. Then all the proper machinery will continue to work. IMHO "migration" is the wrong idea if the data isn't actually moving. Jason