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[23.128.96.18]) by mx.google.com with ESMTP id q18si5865163ejt.469.2021.02.12.03.39.41; Fri, 12 Feb 2021 03:40:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230240AbhBLLgS (ORCPT + 99 others); Fri, 12 Feb 2021 06:36:18 -0500 Received: from mga04.intel.com ([192.55.52.120]:19162 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbhBLLgJ (ORCPT ); Fri, 12 Feb 2021 06:36:09 -0500 IronPort-SDR: ujN2ft9JopBZ8gFUtD/WwCiEsaDgK7H2r1/gYMfsNhqzr0/k0zFmdPdmgLMqH5cr47/QrsFCoo MQlo7g8kHvLw== X-IronPort-AV: E=McAfee;i="6000,8403,9892"; a="179839817" X-IronPort-AV: E=Sophos;i="5.81,173,1610438400"; d="scan'208";a="179839817" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2021 03:35:28 -0800 IronPort-SDR: fKEZl5tW7/OgtMrdBFFTAyhyBIzGnvXuMoKgxRUWTCg48aGQRJQ57JNa3VNuVLgoQRsx/mtOcB rGAiEOwDjKXA== X-IronPort-AV: E=Sophos;i="5.81,173,1610438400"; d="scan'208";a="579244453" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2021 03:35:25 -0800 Received: from andy by smile with local (Exim 4.94) (envelope-from ) id 1lAWjK-004TUA-I8; Fri, 12 Feb 2021 13:35:22 +0200 Date: Fri, 12 Feb 2021 13:35:22 +0200 From: Andy Shevchenko To: Arnd Bergmann Cc: "Song Bao Hua (Barry Song)" , Grygorii Strashko , luojiaxing , Linus Walleij , Santosh Shilimkar , Kevin Hilman , "open list:GPIO SUBSYSTEM" , "linux-kernel@vger.kernel.org" , "linuxarm@openeuler.org" Subject: Re: [Linuxarm] Re: [PATCH for next v1 1/2] gpio: omap: Replace raw_spin_lock_irqsave with raw_spin_lock in omap_gpio_irq_handler() Message-ID: References: <1612774577-55943-1-git-send-email-luojiaxing@huawei.com> <1612774577-55943-2-git-send-email-luojiaxing@huawei.com> <2a12cf7a21f74a0c9e2552a467b77fae@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 12, 2021 at 11:59:28AM +0100, Arnd Bergmann wrote: > On Fri, Feb 12, 2021 at 11:42 AM Song Bao Hua (Barry Song) > wrote: > > > > Ok, second thought. irqsave before generic_handle_irq() won't defeat > > the purpose of preemption too much as the dispatched irq handlers by > > gpiochip will run in their own threads but not in the thread of > > gpiochip's handler. > > > > so looks like this patch can improve by: > > * move other raw_spin_lock_irqsave to raw_spin_lock; > > * keep the raw_spin_lock_irqsave before generic_handle_irq() to mute > > the warning in genirq. > > It seems that the other drivers just call handle_nested_irq() instead > of generic_handle_irq(). And IIRC all of them request threaded IRQ explicitly. -- With Best Regards, Andy Shevchenko