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Subject: Re: [PATCH v2 4/7] clk: mstar: MStar/SigmaStar MPLL driver
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     w@1wt.eu, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Daniel Palmer <daniel@0x0f.com>
To:     Daniel Palmer <daniel@0x0f.com>, devicetree@vger.kernel.org,
        linux-clk@vger.kernel.org
Date:   Sun, 14 Feb 2021 12:32:17 -0800
Message-ID: <161333473746.1254594.8116415179063395207@swboyd.mtv.corp.google.com>
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Quoting Daniel Palmer (2021-02-10 21:22:03)
> This adds a basic driver for the MPLL block found in MStar/SigmaStar
> ARMv7 SoCs.
>=20
> Currently this driver is only good for calculating the rates of it's
> outputs and the actual configuration must be done before the kernel
> boots. Usually this is done even before u-boot starts.
>=20
> This driver targets the MPLL block found in the MSC313/MSC313E but
> there is no documentation this chip so the register descriptions for
> the another MStar chip the MST786 were used as they seem to match.
>=20
> Signed-off-by: Daniel Palmer <daniel@0x0f.com>
> ---

Applied to clk-next