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To:     Julien Grall <julien@xen.org>, xen-devel@lists.xenproject.org,
        linux-kernel@vger.kernel.org
Cc:     Boris Ostrovsky <boris.ostrovsky@oracle.com>,
        Stefano Stabellini <sstabellini@kernel.org>
References: <20210211101616.13788-1-jgross@suse.com>
 <20210211101616.13788-4-jgross@suse.com>
 <eed12192-a740-e767-1762-828c75de66ce@xen.org>
From:   =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= <jgross@suse.com>
Subject: Re: [PATCH v2 3/8] xen/events: avoid handling the same event on two
 cpus at the same time
Message-ID: <c4d930c1-331f-6a1e-7d26-cf066cecda33@suse.com>
Date:   Mon, 15 Feb 2021 07:55:14 +0100
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= <jgross@suse.com>
To: Julien Grall <julien@xen.org>, xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>,
 Stefano Stabellini <sstabellini@kernel.org>
Message-ID: <c4d930c1-331f-6a1e-7d26-cf066cecda33@suse.com>
Subject: Re: [PATCH v2 3/8] xen/events: avoid handling the same event on two
 cpus at the same time
References: <20210211101616.13788-1-jgross@suse.com>
 <20210211101616.13788-4-jgross@suse.com>
 <eed12192-a740-e767-1762-828c75de66ce@xen.org>
In-Reply-To: <eed12192-a740-e767-1762-828c75de66ce@xen.org>

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On 14.02.21 22:34, Julien Grall wrote:
> Hi Juergen,
>=20
> On 11/02/2021 10:16, Juergen Gross wrote:
>> When changing the cpu affinity of an event it can happen today that
>> (with some unlucky timing) the same event will be handled on the old
>> and the new cpu at the same time.
>>
>> Avoid that by adding an "event active" flag to the per-event data and
>> call the handler only if this flag isn't set.
>>
>> Reported-by: Julien Grall <julien@xen.org>
>> Signed-off-by: Juergen Gross <jgross@suse.com>
>> ---
>> V2:
>> - new patch
>> ---
>> =C2=A0 drivers/xen/events/events_base.c | 19 +++++++++++++++----
>> =C2=A0 1 file changed, 15 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/xen/events/events_base.c=20
>> b/drivers/xen/events/events_base.c
>> index e157e7506830..f7e22330dcef 100644
>> --- a/drivers/xen/events/events_base.c
>> +++ b/drivers/xen/events/events_base.c
>> @@ -102,6 +102,7 @@ struct irq_info {
>> =C2=A0 #define EVT_MASK_REASON_EXPLICIT=C2=A0=C2=A0=C2=A0 0x01
>> =C2=A0 #define EVT_MASK_REASON_TEMPORARY=C2=A0=C2=A0=C2=A0 0x02
>> =C2=A0 #define EVT_MASK_REASON_EOI_PENDING=C2=A0=C2=A0=C2=A0 0x04
>> +=C2=A0=C2=A0=C2=A0 u8 is_active;=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0 /* Is event just being handled? */
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned irq;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 evtchn_port_t evtchn;=C2=A0=C2=A0 /* ev=
ent channel */
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned short cpu;=C2=A0=C2=A0=C2=A0=C2=
=A0 /* cpu bound */
>> @@ -622,6 +623,7 @@ static void xen_irq_lateeoi_locked(struct irq_info=
=20
>> *info, bool spurious)
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 info->eoi_time =3D 0;
>> +=C2=A0=C2=A0=C2=A0 smp_store_release(&info->is_active, 0);
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 do_unmask(info, EVT_MASK_REASON_EOI_PEN=
DING);
>> =C2=A0 }
>> @@ -809,13 +811,15 @@ static void pirq_query_unmask(int irq)
>> =C2=A0 static void eoi_pirq(struct irq_data *data)
>> =C2=A0 {
>> -=C2=A0=C2=A0=C2=A0 evtchn_port_t evtchn =3D evtchn_from_irq(data->irq=
);
>> +=C2=A0=C2=A0=C2=A0 struct irq_info *info =3D info_for_irq(data->irq);=

>> +=C2=A0=C2=A0=C2=A0 evtchn_port_t evtchn =3D info ? info->evtchn : 0;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct physdev_eoi eoi =3D { .irq =3D p=
irq_from_irq(data->irq) };
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int rc =3D 0;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!VALID_EVTCHN(evtchn))
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return;
>> +=C2=A0=C2=A0=C2=A0 smp_store_release(&info->is_active, 0);
>=20
> Would you mind to explain why you are using the release semantics?

It is basically releasing a lock. So release semantics seem to be
appropriate.

> It is also not clear to me if there are any expected ordering between=20
> clearing is_active and clearing the pending bit.

No, I don't think there is a specific ordering required. is_active is
just guarding against two simultaneous IRQ handler calls for the same
event being active. Clearing the pending bit is not part of the guarded
section.

>=20
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clear_evtchn(evtchn);
>=20
>=20
> The 2 lines here seems to be a common pattern in this patch. So I would=
=20
> suggest to create a new helper.

Okay.


Juergen

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