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Subject: Re: [PATCH] dt-bindings: iio: samsung,exynos-adc: add common clock
 properties
To:     Krzysztof Kozlowski <krzk@kernel.org>,
        Jonathan Cameron <jic23@kernel.org>,
        Lars-Peter Clausen <lars@metafoo.de>,
        Peter Meerwald-Stadler <pmeerw@pmeerw.net>,
        Rob Herring <robh+dt@kernel.org>,
        Lee Jones <lee.jones@linaro.org>,
        Mark Brown <broonie@kernel.org>, linux-iio@vger.kernel.org,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
From:   Marek Szyprowski <m.szyprowski@samsung.com>
Message-ID: <85ed4a70-5cd8-3bce-100f-33a1fba7f3fa@samsung.com>
Date:   Mon, 15 Feb 2021 10:01:48 +0100
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References: <CGME20210212164148eucas1p2ab09436a82d50161ff1a9fc1a169f7d7@eucas1p2.samsung.com>
        <20210212163816.70058-1-krzk@kernel.org>
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Hi Krzysztof,

On 12.02.2021 17:38, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (assigned-clocks and similar)
> to fix dtbs_check warnings like:
>
>    arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml:
>      adc@126c0000: assigned-clock-rates: [[6000000]] is not of type 'object'
>    arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml:
>      adc@126c0000: assigned-clocks: [[7, 238]] is not of type 'object'

Does it mean that assigned-clocks related properties have to be added to 
almost all bindings? IMHO this is an over-engineering and this has to be 
handled somewhere else...

> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>   .../bindings/iio/adc/samsung,exynos-adc.yaml         | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> index c65921e66dc1..ce03132f8ebc 100644
> --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> @@ -27,6 +27,18 @@ properties:
>     reg:
>       maxItems: 1
>   
> +  assigned-clocks:
> +    minItems: 1
> +    maxItems: 3
> +
> +  assigned-clock-parents:
> +    minItems: 1
> +    maxItems: 3
> +
> +  assigned-clock-rates:
> +    minItems: 1
> +    maxItems: 3
> +
>     clocks:
>       description:
>         Phandle to ADC bus clock. For Exynos3250 additional clock is needed.

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland