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References: <20210215175400.13126-1-gakula@marvell.com>
In-Reply-To: <20210215175400.13126-1-gakula@marvell.com>
From:   Sunil Kovvuri <sunil.kovvuri@gmail.com>
Date:   Mon, 15 Feb 2021 23:45:02 +0530
Message-ID: <CA+sq2Cc5d4oJUNA96wMgEf3jgf4500Yu2G9TKA=cHuG8oyHtZw@mail.gmail.com>
Subject: Re: [net-next PATCH] octeontx2-af: cn10k: Fixes CN10K RPM reference issue
To:     Geetha sowjanya <gakula@marvell.com>
Cc:     Linux Netdev List <netdev@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        "David S. Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Sunil Goutham <sgoutham@marvell.com>,
        Linu Cherian <lcherian@marvell.com>,
        hariprasad <hkelam@marvell.com>,
        Subbaraya Sundeep <sbhatta@marvell.com>,
        Jerin Jacob <jerinj@marvell.com>
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On Mon, Feb 15, 2021 at 11:27 PM Geetha sowjanya <gakula@marvell.com> wrote:
>
> This patch fixes references to uninitialized variables and
> debugfs entry name for CN10K platform and HW_TSO flag check.
>
> Signed-off-by: Geetha sowjanya <gakula@marvell.com>
> Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
>
> This patch fixes the bug introduced by the commit
> 3ad3f8f93c81 ("octeontx2-af: cn10k: MAC internal loopback support".
> These changes are not yet merged into net branch, hence submitting
> to net-next.
>
> ---
>  drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c   |  2 ++
>  .../net/ethernet/marvell/octeontx2/af/rvu_debugfs.c   |  2 +-
>  .../net/ethernet/marvell/octeontx2/nic/otx2_txrx.c    | 11 ++++++-----
>  3 files changed, 9 insertions(+), 6 deletions(-)
>

> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c
> index 3f778fc054b5..22ec03a618b1 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c
> @@ -816,22 +816,23 @@ static bool is_hw_tso_supported(struct otx2_nic *pfvf,
>  {
>         int payload_len, last_seg_size;
>
> +       if (test_bit(HW_TSO, &pfvf->hw.cap_flag))
> +               return true;
> +
> +       /* On 96xx A0, HW TSO not supported */
> +       if (!is_96xx_B0(pfvf->pdev))
> +               return false;
>
>         /* HW has an issue due to which when the payload of the last LSO
>          * segment is shorter than 16 bytes, some header fields may not
>          * be correctly modified, hence don't offload such TSO segments.
>          */
> -       if (!is_96xx_B0(pfvf->pdev))
> -               return true;
>
>         payload_len = skb->len - (skb_transport_offset(skb) + tcp_hdrlen(skb));
>         last_seg_size = payload_len % skb_shinfo(skb)->gso_size;
>         if (last_seg_size && last_seg_size < 16)
>                 return false;
>
> -       if (!test_bit(HW_TSO, &pfvf->hw.cap_flag))
> -               return false;
> -
>         return true;
>  }

The HW_TSO flag should not be set for B0 silicon as well, otherwise
the checks related to
HW issue mentioned above will not come into effect.

Thanks,
Sunil.