Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp5259917pxb; Mon, 15 Feb 2021 14:23:49 -0800 (PST) X-Google-Smtp-Source: ABdhPJxlAEcL3owJ2bhQ1aWllyX7TukiRhoC+NuGCULeVLm+wFj/M6gzttViztb3f5AxO1+Ooy5P X-Received: by 2002:a05:6402:1b01:: with SMTP id by1mr11279875edb.61.1613427829252; Mon, 15 Feb 2021 14:23:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1613427829; cv=none; d=google.com; s=arc-20160816; b=RbQOefdfTQXoMpThQhVXms3USzz06wL5UepFaVWcbk9/4UZKE/a5LEyeMvBv7McO2k eevkjtWrno0Ud9IyozS7Eq7UrU2/+RjNkEVeMwQ0PKEUNwDcAbPFKllOnVArCU0iyeH3 RcNBOlMuwT+KPlt6EaVfRDwLWhspizoEnijHYeRnPOtpW0mb+leO+U6Y4aJae5kX4L7s +UIurunXsSH65vR6Qa+Oj8v4prwm5dA0pgdpXTjV2bfInqe8pCCMSlqvrQ4KAC18KHd7 80hu3j56YwRnCnNrviHiqTCWbZIfjA2n4VLW8SBnfLnoTEkQqCaIaW+dOxkf3UbJV6aZ GKng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:message-id:in-reply-to :subject:cc:to:from:date; bh=RwRgIoya3KTLGuwTs+RBIYXGtkszN7QzTMosR/PNJ/o=; b=pPOWHjiQ9JcgPBD52GFYztYD3Vx9q4FyAXK4gTPUxXMBbpcLKo4Q6mC8u9KBgu23/g Oy/j6HTyjUpfmdFrr/Mno2l4ojm5+npjxOFzCMhh7O4xbLFmM107X1ljjLoqQB83jXUf 5pXEq5ZZ/zn7gT6KtvWoDXn80qGKnVqwaE4okgOshT/AJyMnJMqiLTLS7Bm14SRxM1ye wNAkhhmBgQWVZTvOUtUUEfTXJo9zeZh2XgfDFpuGvbsObAdlwNxwEVINqT3kYqfVI6IT tvnnqQof8lSPqFkgMCatwkPW+rUNB7Wt8fVjcL0hPd8MBoejuU2L0lExXQtuSc1aHZh5 NGZQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l1si13339464ejb.137.2021.02.15.14.23.25; Mon, 15 Feb 2021 14:23:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229721AbhBOWW7 (ORCPT + 99 others); Mon, 15 Feb 2021 17:22:59 -0500 Received: from kvm5.telegraphics.com.au ([98.124.60.144]:45148 "EHLO kvm5.telegraphics.com.au" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229713AbhBOWW6 (ORCPT ); Mon, 15 Feb 2021 17:22:58 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by kvm5.telegraphics.com.au (Postfix) with ESMTP id E14432A4CB; Mon, 15 Feb 2021 17:22:14 -0500 (EST) Date: Tue, 16 Feb 2021 09:22:12 +1100 (AEDT) From: Finn Thain To: Andy Shevchenko cc: "Song Bao Hua (Barry Song)" , Arnd Bergmann , "tglx@linutronix.de" , "gregkh@linuxfoundation.org" , "arnd@arndb.de" , "geert@linux-m68k.org" , "funaho@jurai.org" , "philb@gnu.org" , "corbet@lwn.net" , "mingo@redhat.com" , "linux-m68k@lists.linux-m68k.org" , "linux-kernel@vger.kernel.org" Subject: Re: [RFC] IRQ handlers run with some high-priority interrupts(not NMI) enabled on some platform In-Reply-To: Message-ID: <6bdbd8d8-add1-3c5c-8e3b-8b5ffb715b42@telegraphics.com.au> References: <24e0652b3afa48cdbf7c83287e43c087@hisilicon.com> <0b766dba0b004ced94131e158cd8e67d@hisilicon.com> <5148eb2aaceb42d78087bc6d8ce15183@hisilicon.com> <5fcea94e-6fc9-c340-d7d2-4ae8b69890b8@telegraphics.com.au> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 15 Feb 2021, Andy Shevchenko wrote: > On Sun, Feb 14, 2021 at 7:12 AM Finn Thain wrote: > > On Sat, 13 Feb 2021, Song Bao Hua (Barry Song) wrote: > > > So what is really confusing and a pain to me is that: > > > For years people like me have been writing device drivers > > > with the idea that irq handlers run with interrupts > > > disabled after those commits in genirq. So I don't need > > > to care about if some other IRQs on the same cpu will > > > jump out to access the data the current IRQ handler > > > is accessing. > > > > > > but it turns out the assumption is not true on some platform. > > > So should I start to program devices driver with the new idea > > > interrupts can actually come while irqhandler is running? > > > > > > That's the question which really bothers me. > > > > > > > That scenario seems a little contrived to me (drivers for two or more > > devices sharing state through their interrupt handlers). Is it real? > > I suppose every platform has its quirks. The irq lock in sonic_interrupt() > > is only there because of a platform quirk (the same device can trigger > > either of two IRQs). Anyway, no-one expects all drivers to work on all > > platforms; I don't know why it bothers you so much when platforms differ. > > Isn't it any IRQ chip driver which may get IRQ on one or more lines > simultaneously? > The question here is can the handler be re-entrant on the same CPU in > that case? > An irq_chip handler used only for interrupts having the same priority level cannot be re-entered, thanks to the priority mask. Where the priority levels are different, as in auto_irq_chip in arch/m68k/kernel/ints.c, handle_simple_irq() can be re-entered but not with the same descriptor (i.e. no shared state). Documentation/core-api/genericirq.rst says, The locking of chip registers is up to the architecture that defines the chip primitives. The per-irq structure is protected via desc->lock, by the generic layer. Since the synchronization of chip registers is left up to the architecture, I think the related code should be portable. Looking in kernel/irq/*.c, I see that desc->lock is sometimes acquired with raw_spin_lock_irq(&desc->lock) and sometimes raw_spin_lock(&desc->lock). I don't know whether there are portability issues lurking here; this code is subtle and largely unfamiliar to me.