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[23.128.96.18]) by mx.google.com with ESMTP id t22si13772585ejf.399.2021.02.16.08.16.26; Tue, 16 Feb 2021 08:16:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230397AbhBPQPH (ORCPT + 99 others); Tue, 16 Feb 2021 11:15:07 -0500 Received: from mga01.intel.com ([192.55.52.88]:31319 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230523AbhBPQOE (ORCPT ); Tue, 16 Feb 2021 11:14:04 -0500 IronPort-SDR: p6B7IAjR+JbFEJhmo/Vbj/T/AzluSHFPYwMVsByOt3+hka5RbUJr+tBbOVvu7Y5x9BVHoZcszM Xds5jRQv7x9Q== X-IronPort-AV: E=McAfee;i="6000,8403,9897"; a="202118728" X-IronPort-AV: E=Sophos;i="5.81,184,1610438400"; d="scan'208";a="202118728" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Feb 2021 08:08:19 -0800 IronPort-SDR: UkPu11ElyCM7ZagQh8g5k2+49Z1zt8dOHb+x6fdX08rJhZ8jPhqaqgHE68BX+6QLS2goMYuwcv /LVL2yjAhyDA== X-IronPort-AV: E=Sophos;i="5.81,184,1610438400"; d="scan'208";a="493336786" Received: from gna-dev.igk.intel.com ([10.102.80.34]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Feb 2021 08:08:17 -0800 From: Maciej Kwapulinski To: Greg Kroah-Hartman , Arnd Bergmann , Jonathan Corbet , Derek Kiernan , Dragan Cvetic Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Maciej Kwapulinski , Tomasz Jankowski , Savo Novakovic , Jianxun Zhang Subject: [PATCH v1 10/12] gna: add interrupt handler Date: Tue, 16 Feb 2021 17:05:23 +0100 Message-Id: <20210216160525.5028-11-maciej.kwapulinski@linux.intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210216160525.5028-1-maciej.kwapulinski@linux.intel.com> References: <20210216160525.5028-1-maciej.kwapulinski@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tomasz Jankowski An interrupt is generated by the hardware when a scoring job is done. The interrupt handler wakes up the work queue to resume the processing on the current request. Signed-off-by: Tomasz Jankowski Tested-by: Savo Novakovic Co-developed-by: Jianxun Zhang Signed-off-by: Jianxun Zhang Signed-off-by: Maciej Kwapulinski --- drivers/misc/gna/gna_device.c | 32 ++++++++++++++++++++++++++++++-- drivers/misc/gna/gna_device.h | 2 ++ drivers/misc/gna/gna_hw.c | 10 ++++++++++ drivers/misc/gna/gna_hw.h | 2 ++ 4 files changed, 44 insertions(+), 2 deletions(-) diff --git a/drivers/misc/gna/gna_device.c b/drivers/misc/gna/gna_device.c index a229f51fb17b..5198326e8af4 100644 --- a/drivers/misc/gna/gna_device.c +++ b/drivers/misc/gna/gna_device.c @@ -182,6 +182,27 @@ int gna_probe(struct pci_dev *pcidev, const struct pci_device_id *pci_id) goto err_clear_master; } + ret = pci_alloc_irq_vectors(pcidev, 1, 1, PCI_IRQ_ALL_TYPES); + if (ret < 0) + goto err_clear_master; + + gna_priv->irq = pci_irq_vector(pcidev, 0); + if (unlikely(gna_priv->irq < 0)) { + dev_err(&pcidev->dev, "could not obtain irq number\n"); + ret = -EIO; + goto err_free_irq_vector; + } + + ret = request_irq(gna_priv->irq, gna_interrupt, + IRQF_SHARED, GNA_DRV_NAME, gna_priv); + + if (ret) { + dev_err(&pcidev->dev, "could not register for interrupt\n"); + goto err_free_irq_vector; + } + + dev_dbg(&pcidev->dev, "irq num %d\n", gna_priv->irq); + /* Map BAR0 */ gna_priv->bar0.iostart = pci_resource_start(pcidev, 0); gna_priv->bar0.iosize = pci_resource_len(pcidev, 0); @@ -189,7 +210,7 @@ int gna_probe(struct pci_dev *pcidev, const struct pci_device_id *pci_id) if (!gna_priv->bar0.mem_addr) { dev_err(&pcidev->dev, "could not map BAR 0\n"); ret = -EINVAL; - goto err_clear_master; + goto err_free_irq; } dev_dbg(&pcidev->dev, "bar0 io start: 0x%llx\n", (unsigned long long)gna_priv->bar0.iostart); @@ -199,11 +220,15 @@ int gna_probe(struct pci_dev *pcidev, const struct pci_device_id *pci_id) ret = gna_dev_init(gna_priv, pcidev, pci_id); if (ret) { dev_err(&pcidev->dev, "could not initialize gna private structure\n"); - goto err_clear_master; + goto err_free_irq; } return 0; +err_free_irq: + free_irq(gna_priv->irq, gna_priv); +err_free_irq_vector: + pci_free_irq_vectors(pcidev); err_clear_master: pci_clear_master(pcidev); err_release_regions: @@ -219,7 +244,10 @@ void gna_remove(struct pci_dev *pcidev) gna_priv = pci_get_drvdata(pcidev); + free_irq(gna_priv->irq, gna_priv); + gna_dev_deinit(gna_priv); + pci_free_irq_vectors(pcidev); pci_clear_master(pcidev); pci_release_regions(pcidev); diff --git a/drivers/misc/gna/gna_device.h b/drivers/misc/gna/gna_device.h index 0855972cd085..77cd1a458367 100644 --- a/drivers/misc/gna/gna_device.h +++ b/drivers/misc/gna/gna_device.h @@ -46,12 +46,14 @@ struct gna_private { struct device dev; struct cdev cdev; + /* hardware status set by interrupt handler */ u32 hw_status; /* device related resources */ struct gna_pci_bar bar0; struct gna_drv_info info; struct gna_hw_info hw_info; + int irq; struct gna_mmu_object mmu; /* lock protecting mmu structure */ diff --git a/drivers/misc/gna/gna_hw.c b/drivers/misc/gna/gna_hw.c index 48e09e5f3ca8..6146cbd43004 100644 --- a/drivers/misc/gna/gna_hw.c +++ b/drivers/misc/gna/gna_hw.c @@ -124,3 +124,13 @@ void gna_abort_hw(struct gna_private *gna_priv) if (i == 0) dev_err(&gna_priv->dev, "abort did not complete\n"); } + +irqreturn_t gna_interrupt(int irq, void *priv) +{ + struct gna_private *gna_priv; + + gna_priv = (struct gna_private *)priv; + gna_priv->busy = false; + wake_up(&gna_priv->busy_waitq); + return IRQ_HANDLED; +} diff --git a/drivers/misc/gna/gna_hw.h b/drivers/misc/gna/gna_hw.h index 4da29870c4dc..4dfa05937943 100644 --- a/drivers/misc/gna/gna_hw.h +++ b/drivers/misc/gna/gna_hw.h @@ -6,6 +6,7 @@ #include #include +#include #include /* GNA MMIO registers */ @@ -70,6 +71,7 @@ struct gna_desc_info { struct gna_private; struct gna_compute_cfg; +irqreturn_t gna_interrupt(int irq, void *ctx); void gna_abort_hw(struct gna_private *gna_priv); bool gna_hw_perf_enabled(struct gna_private *gna_priv); int gna_parse_hw_status(struct gna_private *gna_priv, u32 hw_status); -- 2.28.0