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From:   James Spader <jamesspader.linux@gmail.com>
Date:   Wed, 17 Feb 2021 08:21:01 +0530
Message-ID: <CAKpeocU=yHJnLR0y1x7meW_C8ExBuTU=Cy4TWaWO+kcyo+c5Zg@mail.gmail.com>
Subject: Re: mlx5 HW crypto offload support
To:     Saeed Mahameed <saeedm@nvidia.com>
Cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Raed Salem <raeds@nvidia.com>, Huy Nguyen <huyn@nvidia.com>
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Hi Saeed

Thank you so much for the response!! It helped me a lot.

The guide is very helpful. It is detailed and well written.


Thank you
Best regards
- James


On Wed, Feb 17, 2021 at 3:26 AM Saeed Mahameed <saeedm@nvidia.com> wrote:
>
> On Mon, 2021-02-15 at 23:17 +0530, James Spader wrote:
> > Hi All,
> >
> > Does HW crypto offload support for mlx5 work under virtualized
> > environment?
> > For e.g with PF (Physical Function) driver and VF(Virtual Function)
> > driver.
> >
> > If yes, then how does the information that is required to create
> > security association get passed to the PF driver?
> >
> > For example in rx full offload the FDB table needs to match the spi.
> > As the spi is created by the VF driver, how does its value get
> > communicated to PF driver...
> >
>
> Hi James,
>
> please find this guide [1] for a step by step configuration, i hope it
> will answer your questions.
>
> the solution is only in OFED package right now, Huy and Raed "CCed" are
> working on the upstream submission.
>
> The link below discusses the configuration for Bluefield smart device,
> but the concept should be the same for Native SRIOV.
>
> [1]
> https://community.mellanox.com/s/article/ConnectX-6DX-Bluefield-2-IPsec-HW-Full-Offload-Configuration-Guide
>