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Date:   Sun, 21 Feb 2021 10:13:17 +0000
From:   Russell King - ARM Linux admin <linux@armlinux.org.uk>
To:     Jian Cai <jiancai@google.com>
Cc:     Mark Rutland <mark.rutland@arm.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        James Morris <jmorris@namei.org>, manojgupta@google.com,
        Will Deacon <will@kernel.org>, Ingo Molnar <mingo@kernel.org>,
        Marc Zyngier <maz@kernel.org>,
        Masahiro Yamada <masahiroy@kernel.org>,
        Ard Biesheuvel <ardb@kernel.org>,
        clang-built-linux@googlegroups.com, llozano@google.com,
        David Brazdil <dbrazdil@google.com>,
        "Serge E. Hallyn" <serge@hallyn.com>,
        Kees Cook <keescook@chromium.org>,
        Arnd Bergmann <arnd@arndb.de>,
        Nathan Chancellor <nathan@kernel.org>,
        linux-arm-kernel@lists.infradead.org, ndesaulniers@google.com,
        linux-kernel@vger.kernel.org,
        linux-security-module@vger.kernel.org,
        David Laight <David.Laight@aculab.com>,
        James Morse <james.morse@arm.com>,
        Andrew Morton <akpm@linux-foundation.org>,
        Andreas =?iso-8859-1?Q?F=E4rber?= <afaerber@suse.de>,
        Mike Rapoport <rppt@kernel.org>
Subject: Re: [PATCH v4] ARM: Implement SLS mitigation
Message-ID: <20210221101317.GN1463@shell.armlinux.org.uk>
References: <20210219201852.3213914-1-jiancai@google.com>
 <20210219230841.875875-1-jiancai@google.com>
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Sender: Russell King - ARM Linux admin <linux@armlinux.org.uk>
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On Fri, Feb 19, 2021 at 03:08:13PM -0800, Jian Cai wrote:
> diff --git a/security/Kconfig.hardening b/security/Kconfig.hardening
> index 269967c4fc1b..146b75a79d9e 100644
> --- a/security/Kconfig.hardening
> +++ b/security/Kconfig.hardening
> @@ -121,6 +121,16 @@ choice
>  
>  endchoice
>  
> +config HARDEN_SLS_ALL
> +	bool "enable SLS vulnerability hardening"
> +	default n

Please get rid of this useless "default n"

> +	depends on $(cc-option,-mharden-sls=all)
> +	help
> +	  Enables straight-line speculation vulnerability hardening on ARM and ARM64
> +	  architectures. It inserts speculation barrier sequences (SB or DSB+ISB
> +	  depending on the target architecture) after RET and BR, and replacing
> +	  BLR with BL+BR sequence.

Given that this is in an architecture independent Kconfig file, and it
detects support in CC for this feature, why should this help text be
written to be specific to a couple of architectures? Will this feature
only ever be available on these two architectures? What if someone adds
support for another architecture?

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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