Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
MIME-Version: 1.0
References: <1613750416-11901-1-git-send-email-abel.vesa@nxp.com> <1613750416-11901-16-git-send-email-abel.vesa@nxp.com>
In-Reply-To: <1613750416-11901-16-git-send-email-abel.vesa@nxp.com>
From:   Krzysztof Kozlowski <krzk@kernel.org>
Date:   Sun, 21 Feb 2021 16:47:59 +0100
Message-ID: <CAJKOXPdNx7LSpNS7VmwpGXyNSUSZjEVDMmVpz1T3nmqWWuqH=g@mail.gmail.com>
Subject: Re: [RFC 15/19] arm64: dts: imx8mq: Add all pl301 nodes
To:     Abel Vesa <abel.vesa@nxp.com>
Cc:     Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <kernel@pengutronix.de>,
        Lucas Stach <l.stach@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        Chanwoo Choi <cw00.choi@samsung.com>,
        Georgi Djakov <djakov@kernel.org>,
        Dong Aisheng <aisheng.dong@nxp.com>,
        Peng Fan <peng.fan@nxp.com>,
        Martin Kepplinger <martink@posteo.de>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-clk@vger.kernel.org,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        NXP Linux Team <linux-imx@nxp.com>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

On Fri, 19 Feb 2021 at 17:04, Abel Vesa <abel.vesa@nxp.com> wrote:
>
> Add all the pl301s found on i.MX8MQ, according to the bus diagram.
> Each pl301 has its own clock, icc id and opp table. They are probed
> by the imx-bus driver.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 180 ++++++++++++++++++++++
>  1 file changed, 180 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index e30e948648e9..5f9ffa465d6c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1447,5 +1447,185 @@ ddr-pmu@3d800000 {
>                         interrupt-parent = <&gic>;
>                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
>                 };
> +
> +               pl301_main: pl301@0 {
> +                       compatible = "fsl,imx8m-nic";

Does it pass dtc W=1 and dtbs_check without the "reg" property?

Please also name the node in a generic way (see for example  DT spec
"2.2.2 Generic Names Recommendation").

Best regards,
Krzysztof