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Subject: Re: [PATCH v2 2/2] irqchip: add support for BCM6345 external
 interrupt controller
From:   =?utf-8?Q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari@gmail.com>
In-Reply-To: <7de8507d-82dd-291e-1f63-7c1460e6a6b2@gmail.com>
Date:   Wed, 24 Feb 2021 08:08:28 +0100
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Jonas Gorski <jonas.gorski@gmail.com>,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        bcm-kernel-feedback-list@broadcom.com, linux-mips@vger.kernel.org
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Message-Id: <C423E680-1741-43C0-A4DA-DCF65509C510@gmail.com>
References: <20210223180840.28771-1-noltari@gmail.com>
 <20210223204340.312-1-noltari@gmail.com>
 <20210223204340.312-3-noltari@gmail.com>
 <7de8507d-82dd-291e-1f63-7c1460e6a6b2@gmail.com>
To:     Florian Fainelli <f.fainelli@gmail.com>
Precedence: bulk

Hi Florian,

> El 24 feb 2021, a las 4:43, Florian Fainelli <f.fainelli@gmail.com> =
escribi=C3=B3:
>=20
>=20
>=20
> On 2/23/2021 12:43 PM, =C3=81lvaro Fern=C3=A1ndez Rojas wrote:
>> This interrupt controller is present on bcm63xx SoCs in order to =
generate
>> interrupts based on GPIO status changes.
>>=20
>> Signed-off-by: =C3=81lvaro Fern=C3=A1ndez Rojas <noltari@gmail.com>
>> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
>> ---
>=20
> [snip]
>> +static int __init bcm6345_ext_intc_of_init(struct device_node *node,
>> +					   struct device_node *parent)
>> +{
>> +	int num_irqs, ret =3D -EINVAL;
>> +	unsigned i;
>> +	void __iomem *base;
>> +	int irqs[MAX_IRQS] =3D { 0 };
>> +	u32 shift;
>> +	bool toggle_clear_on_ack =3D false;
>> +
>> +	num_irqs =3D of_irq_count(node);
>> +
>> +	if (!num_irqs || num_irqs > MAX_IRQS)
>> +		return -EINVAL;
>> +
>> +	if (of_property_read_u32(node, "brcm,field-width", &shift))
>> +		shift =3D 4;
>=20
> This property is not documented in the binding, other than that:

Nice catch, I will add it in next version.

>=20
> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> --=20
> Florian