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References: <20210224091742.1060508-1-ikjn@chromium.org>
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From:   Enric Balletbo Serra <eballetbo@gmail.com>
Date:   Wed, 24 Feb 2021 11:30:14 +0100
Message-ID: <CAFqH_50BWF4sQnJAnVZDf3Dbuw+LaN67q39DvOh7ipzqNeNEMw@mail.gmail.com>
Subject: Re: [PATCH] arm64: dts: mt8183: Add power-domains properity to mfgcfg
To:     Ikjoon Jang <ikjn@chromium.org>
Cc:     "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        Rob Herring <robh+dt@kernel.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Weiyi Lu <weiyi.lu@mediatek.com>
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Hi Ikjoon,

Thank you for your patch.

Missatge de Ikjoon Jang <ikjn@chromium.org> del dia dc., 24 de febr.
2021 a les 10:21:
>
> mfgcfg clock is under MFG_ASYNC power domain
>
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
> ---
>
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5b782a4769e7..3384df5284c0 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -962,6 +962,7 @@ mfgcfg: syscon@13000000 {
>                         compatible = "mediatek,mt8183-mfgcfg", "syscon";
>                         reg = <0 0x13000000 0 0x1000>;
>                         #clock-cells = <1>;
> +                       power-domains = <&scpsys MT8183_POWER_DOMAIN_MFG_ASYNC>;

I don't think this will work in mainline, at least, the reference name
should be &spm

Thanks,
  Enric
>                 };
>
>                 mmsys: syscon@14000000 {
> --
> 2.30.0.617.g56c4b15f3c-goog
>
>
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