Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp591945pxb; Thu, 25 Feb 2021 09:55:06 -0800 (PST) X-Google-Smtp-Source: ABdhPJwvb1UxWxvYrXE9n4or3sRP3SlFGniElf36whUsS0AidKufo4h+b3DpP4tgMRAB4ZwIODCC X-Received: by 2002:aa7:c944:: with SMTP id h4mr4185060edt.233.1614275706321; Thu, 25 Feb 2021 09:55:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614275706; cv=none; d=google.com; s=arc-20160816; b=Bl1h2sW5Jq8RwKA/Q2R+Q6kGMnnxdNYWdQ0VtifHeuixOccib3NZGrVQKP8qTqARu5 OAdiw6cyDS/B0b83VWPBKqu2WIgZZ1uDoZaazWGeAxDu0Ikww0nWKgwWLs7NwchS8rV5 MVZQ5eXn0/ta1kkzqYFBW5NDDxmEko+/49qMCoACtCzkQ4ZL0JQzqndijz+p7UyJG4di OUDEDId2FxrRwd4xDa3x5J2F6iQJRQwbB+bQrZIDcG3t1DqPoPg/v5BySJ0P5SiS0Mr0 mibEbXSyonpJUj4zn0lRNjqTwZ8CWggzil3M/A747kwPqOfQFci7seufDBMZmxhzwV/r iDvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=tV7NUZrrwF3yb6FVhw8sfaVmsOQjpDPPqXlhIY98EgU=; b=0LJZWeMbOl40n3sraEXSUWHe7VLl9afUNhk8R/zg0xlfmhTqxCHOyegKHgm/qwi1lU ZBXOepIXi6Hpgovdne9NtgV6l7Pzfi01pIE0e7oSh5QWdJ/F23zV2T/4IMHFDA9AW9ud c9w+D/8L7cKfOcA5f0GL3Old5iyroRH6utZKRK2r1mtmIyXt4d/S1AMrxPtLCfWNVS+G znz4ZB3k1aH11cEiYaL5YiUxWbHqWN4IXtMnt2+MJQlNAB4nRm8XbGWp7QhsgGxud/UH b6SUigonYI4jYE9CA0kVwhCQNd6jvGkgjmrZIR2AJ/41ozknvYbOqNLKL+e0d1/rU5kD XDxA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id jw5si525181ejc.103.2021.02.25.09.54.43; Thu, 25 Feb 2021 09:55:06 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232770AbhBYRwN (ORCPT + 99 others); Thu, 25 Feb 2021 12:52:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232412AbhBYRu4 (ORCPT ); Thu, 25 Feb 2021 12:50:56 -0500 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD927C061788 for ; Thu, 25 Feb 2021 09:50:16 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 1A9571F463CC From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: Collabora Kernel ML , matthias.bgg@gmail.com, drinkcat@chromium.org, hsinyi@chromium.org, weiyi.lu@mediatek.com, Fabien Parent , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 4/4] soc: mediatek: pm-domains: Add a power domain names for mt8167 Date: Thu, 25 Feb 2021 18:50:00 +0100 Message-Id: <20210225175000.824661-4-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210225175000.824661-1-enric.balletbo@collabora.com> References: <20210225175000.824661-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the power domains names for the mt8167 SoC. Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167") Signed-off-by: Enric Balletbo i Serra --- drivers/soc/mediatek/mt8167-pm-domains.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/soc/mediatek/mt8167-pm-domains.h b/drivers/soc/mediatek/mt8167-pm-domains.h index ad0b8dfa0527..15559ddf26e4 100644 --- a/drivers/soc/mediatek/mt8167-pm-domains.h +++ b/drivers/soc/mediatek/mt8167-pm-domains.h @@ -15,6 +15,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = { [MT8167_POWER_DOMAIN_MM] = { + .name = "mm", .sta_mask = PWR_STATUS_DISP, .ctl_offs = SPM_DIS_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), @@ -26,6 +27,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = { .caps = MTK_SCPD_ACTIVE_WAKEUP, }, [MT8167_POWER_DOMAIN_VDEC] = { + .name = "vdec", .sta_mask = PWR_STATUS_VDEC, .ctl_offs = SPM_VDE_PWR_CON, .sram_pdn_bits = GENMASK(8, 8), @@ -33,6 +35,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = { .caps = MTK_SCPD_ACTIVE_WAKEUP, }, [MT8167_POWER_DOMAIN_ISP] = { + .name = "isp", .sta_mask = PWR_STATUS_ISP, .ctl_offs = SPM_ISP_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), @@ -40,6 +43,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = { .caps = MTK_SCPD_ACTIVE_WAKEUP, }, [MT8167_POWER_DOMAIN_MFG_ASYNC] = { + .name = "mfg_async", .sta_mask = MT8167_PWR_STATUS_MFG_ASYNC, .ctl_offs = SPM_MFG_ASYNC_PWR_CON, .sram_pdn_bits = 0, @@ -50,18 +54,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = { }, }, [MT8167_POWER_DOMAIN_MFG_2D] = { + .name = "mfg_2d", .sta_mask = MT8167_PWR_STATUS_MFG_2D, .ctl_offs = SPM_MFG_2D_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(15, 12), }, [MT8167_POWER_DOMAIN_MFG] = { + .name = "mfg", .sta_mask = PWR_STATUS_MFG, .ctl_offs = SPM_MFG_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(15, 12), }, [MT8167_POWER_DOMAIN_CONN] = { + .name = "conn", .sta_mask = PWR_STATUS_CONN, .ctl_offs = SPM_CONN_PWR_CON, .sram_pdn_bits = GENMASK(8, 8), -- 2.30.0