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From:   Michael Kelley <mikelley@microsoft.com>
To:     Boqun Feng <boqun.feng@gmail.com>
CC:     Stephen Hemminger <sthemmin@microsoft.com>,
        KY Srinivasan <kys@microsoft.com>,
        "wei.liu@kernel.org" <wei.liu@kernel.org>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "bp@alien8.de" <bp@alien8.de>, "hpa@zytor.com" <hpa@zytor.com>,
        "daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
        "arnd@arndb.de" <arnd@arndb.de>,
        "linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "x86@kernel.org" <x86@kernel.org>,
        "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>
Subject: RE: [PATCH 10/10] clocksource/drivers/hyper-v: Move handling of
 STIMER0 interrupts
Thread-Topic: [PATCH 10/10] clocksource/drivers/hyper-v: Move handling of
 STIMER0 interrupts
Thread-Index: AQHW9Ops9ZR2U7oM7UKPy+5kj6GCqKpldZYAgAPvzjA=
Date:   Thu, 25 Feb 2021 18:56:00 +0000
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References: <1611779025-21503-1-git-send-email-mikelley@microsoft.com>
 <1611779025-21503-11-git-send-email-mikelley@microsoft.com>
 <YDSk7scPgUZdwyMd@boqun-archlinux>
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From: Boqun Feng <boqun.feng@gmail.com> Sent: Monday, February 22, 2021 10:=
47 PM
>=20
> On Wed, Jan 27, 2021 at 12:23:45PM -0800, Michael Kelley wrote:
> > STIMER0 interrupts are most naturally modeled as per-cpu IRQs. But
> > because x86/x64 doesn't have per-cpu IRQs, the core STIMER0 interrupt
> > handling machinery is done in code under arch/x86 and Linux IRQs are
> > not used. Adding support for ARM64 means adding equivalent code
> > using per-cpu IRQs under arch/arm64.
> >
> > A better model is to treat per-cpu IRQs as the normal path (which it is
> > for modern architectures), and the x86/x64 path as the exception. Do th=
is
> > by incorporating standard Linux per-cpu IRQ allocation into the main
> > SITMER0 driver code, and bypass it in the x86/x64 exception case. For
> > x86/x64, special case code is retained under arch/x86, but no STIMER0
> > interrupt handling code is needed under arch/arm64.
> >
> > No functional change.
> >
> > Signed-off-by: Michael Kelley <mikelley@microsoft.com>
> > ---
> >  arch/x86/hyperv/hv_init.c          |   2 +-
> >  arch/x86/include/asm/mshyperv.h    |   4 -
> >  arch/x86/kernel/cpu/mshyperv.c     |  10 +--
> >  drivers/clocksource/hyperv_timer.c | 170 +++++++++++++++++++++++++----=
--------
> >  include/asm-generic/mshyperv.h     |   5 --
> >  include/clocksource/hyperv_timer.h |   3 +-
> >  6 files changed, 123 insertions(+), 71 deletions(-)
> >

[snip]

> > +static void hv_remove_stimer0_irq(void)
> > +{
> > +	if (stimer0_irq !=3D -1) {
> > +		free_percpu_irq(stimer0_irq, stimer0_evt);
> > +		free_percpu(stimer0_evt);
> > +		acpi_unregister_gsi(stimer0_irq);
> > +		stimer0_irq =3D -1;
> > +	}
>=20
> I think we need:
>=20
> 	else {
> 		hv_remove_stimer0_handler();
> 	}
>=20
> here?
>=20
> Because previously, on x86 we set hv_stimer0_handler to NULL in
> hv_remove_stimer0_irq(), however, this patch doesn't keep this behavior
> any more.
>=20
> Thoughts?
>=20
> Regards,
> Boqun

Yes, agreed.  Will fix this in v2.

Michael