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Date:   Fri, 26 Feb 2021 13:36:33 +0530
From:   Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To:     Jordan Crouse <jordan@cosmicpenguin.net>,
        Jordan Crouse <jcrouse@codeaurora.org>
Cc:     Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>,
        Joerg Roedel <joro@8bytes.org>,
        Rob Clark <robdclark@gmail.com>,
        Akhil P Oommen <akhilpo@codeaurora.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] iommu/arm-smmu-qcom: Move the adreno smmu specific
 impl earlier
In-Reply-To: <20210225180652.zwhyjhff3jxm7hcw@cosmicpenguin.net>
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 <ed9bedef1546879c5b5e9f0f3f6d4667ec6b4fc4.1614247752.git.saiprakash.ranjan@codeaurora.org>
 <20210225180652.zwhyjhff3jxm7hcw@cosmicpenguin.net>
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On 2021-02-25 23:36, Jordan Crouse wrote:
> On Thu, Feb 25, 2021 at 03:54:10PM +0530, Sai Prakash Ranjan wrote:
>> Adreno(GPU) SMMU and APSS(Application Processor SubSystem) SMMU
>> both implement "arm,mmu-500" in some QTI SoCs and to run through
>> adreno smmu specific implementation such as enabling split pagetables
>> support, we need to match the "qcom,adreno-smmu" compatible first
>> before apss smmu or else we will be running apps smmu implementation
>> for adreno smmu and the additional features for adreno smmu is never
>> set. For ex: we have "qcom,sc7280-smmu-500" compatible for both apps
>> and adreno smmu implementing "arm,mmu-500", so the adreno smmu
>> implementation is never reached because the current sequence checks
>> for apps smmu compatible(qcom,sc7280-smmu-500) first and runs that
>> specific impl and we never reach adreno smmu specific implementation.
>> 
>> Suggested-by: Akhil P Oommen <akhilpo@codeaurora.org>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>> 
>> Its either this or we add a new compatible for adreno smmu 
>> implementing
>> arm,mmu-500 like "qcom,sc7280-adreno-smmu-500".
>> 
>> ---
>>  drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>> 
>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c 
>> b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> index bea3ee0dabc2..7d0fc2c8e72f 100644
>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> @@ -345,11 +345,11 @@ struct arm_smmu_device 
>> *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
>>  {
>>  	const struct device_node *np = smmu->dev->of_node;
>> 
>> -	if (of_match_node(qcom_smmu_impl_of_match, np))
>> -		return qcom_smmu_create(smmu, &qcom_smmu_impl);
>> -
>>  	if (of_device_is_compatible(np, "qcom,adreno-smmu"))
>>  		return qcom_smmu_create(smmu, &qcom_adreno_smmu_impl);
>> 
>> +	if (of_match_node(qcom_smmu_impl_of_match, np))
>> +		return qcom_smmu_create(smmu, &qcom_smmu_impl);
>> +
> 
> It would be good to add a comment here explaining the order here so we
> don't accidentally reorganize ourselves back into a problem later.
> 

Sure its better, will add it.

Thanks,
Sai

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