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 <20210225215122.GC3567106@xps15>
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From:   Mike Leach <mike.leach@linaro.org>
Date:   Fri, 26 Feb 2021 20:09:57 +0000
Message-ID: <CAJ9a7Vi5Dyb2k7uDxqRg99e-cxKyLkCgimMD8ZSO2m+1NdbFjg@mail.gmail.com>
Subject: Re: [PATCH v4 06/10] coresight: etm-perf: Update to activate selected configuration
To:     Mathieu Poirier <mathieu.poirier@linaro.org>
Cc:     linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        Coresight ML <coresight@lists.linaro.org>,
        "open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
        "Suzuki K. Poulose" <suzuki.poulose@arm.com>,
        Yabin Cui <yabinc@google.com>,
        Jonathan Corbet <corbet@lwn.net>, Leo Yan <leo.yan@linaro.org>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Tingwei Zhang <tingwei@codeaurora.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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Precedence: bulk

Hi Mathieu,

On Thu, 25 Feb 2021 at 21:51, Mathieu Poirier
<mathieu.poirier@linaro.org> wrote:
>
> On Thu, Jan 28, 2021 at 05:09:32PM +0000, Mike Leach wrote:
> > Add calls to activate the selected configuration as perf starts
> > and stops the tracing session.
> >
> > Signed-off-by: Mike Leach <mike.leach@linaro.org>
> > ---
> >  drivers/hwtracing/coresight/coresight-etm-perf.c | 14 +++++++++++++-
> >  drivers/hwtracing/coresight/coresight-etm-perf.h |  2 ++
> >  2 files changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> > index e270bb1e0f7d..5c1aeddabc59 100644
> > --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> > +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> > @@ -178,6 +178,10 @@ static void free_event_data(struct work_struct *work)
> >       /* Free the sink buffers, if there are any */
> >       free_sink_buffer(event_data);
> >
> > +     /* clear any configuration we were using */
> > +     if (event_data->config_id_hash)
> > +             cscfg_deactivate_config(event_data->config_id_hash);
> > +
> >       for_each_cpu(cpu, mask) {
> >               struct list_head **ppath;
> >
> > @@ -236,7 +240,7 @@ static void etm_free_aux(void *data)
> >  static void *etm_setup_aux(struct perf_event *event, void **pages,
> >                          int nr_pages, bool overwrite)
> >  {
> > -     u32 id;
> > +     u32 id, config_id;
>
> config_id, cfg_hash, id_hash...
>

OK - I'll get the naming consistent.

> >       int cpu = event->cpu;
> >       cpumask_t *mask;
> >       struct coresight_device *sink = NULL;
> > @@ -253,6 +257,14 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> >               sink = coresight_get_sink_by_id(id);
> >       }
> >
> > +     /* check if user wants a coresight configuration selected */
> > +     config_id = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32);
> > +     if (config_id) {
> > +             if (cscfg_activate_config(config_id))
> > +                     goto err;
> > +             event_data->config_id_hash = config_id;
> > +     }
> > +
> >       mask = &event_data->mask;
> >
> >       /*
> > diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h
> > index 3646a3837a0b..751d768939d8 100644
> > --- a/drivers/hwtracing/coresight/coresight-etm-perf.h
> > +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h
> > @@ -49,12 +49,14 @@ struct etm_filters {
> >   * @work:            Handle to free allocated memory outside IRQ context.
> >   * @mask:            Hold the CPU(s) this event was set for.
> >   * @snk_config:              The sink configuration.
> > + * @config_id_hash:  The id of any coresight config selected.
> >   * @path:            An array of path, each slot for one CPU.
> >   */
> >  struct etm_event_data {
> >       struct work_struct work;
> >       cpumask_t mask;
> >       void *snk_config;
> > +     u32 config_id_hash;
>
> Please align this with the naming convention you will be using above and
> throughout.
>
> More comments tomorrow.
>
> Thanks,
> Mathieu
>
> >       struct list_head * __percpu *path;
> >  };
> >
> > --
> > 2.17.1
> >

Thanks

Mike

-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK