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charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: fujitsu.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: OSAPR01MB4227.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 19d2bff8-7d6e-4132-9833-08d8dc4a68fd X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Mar 2021 00:39:01.8986 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a19f121d-81e1-4858-a9d8-736e267fd4c7 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iBDldSJmrG5EbFtcs2mSVKNoF3xTZz/PpyvW/tButPBw3NF/fGTY5kJ2zb+SHYMFIUsBVFkC2eYCHHDQtxTuE7xFYfwXDOSyeJhciuXGzk0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: OSAPR01MB2050 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, I plan to add NMI patches which enables IPI_CPU_CRASH_STOP IPI as pseudo-NM= I[1]. But I know need to resolve the instrumentation issues before that. I think = need to moving arm64 entry code over to the generic entry code(kernel/entry= /common.c) for that, is this right? Can you tell me current status? Let me know if there's anything I can do to help. [1]https://lore.kernel.org/lkml/20201104080539.3205889-1-ito-yuichi@fujitsu= .com/ Thanks, Yuichi Ito