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[23.128.96.18]) by mx.google.com with ESMTP id q18si10812211ejy.55.2021.03.04.08.30.35; Thu, 04 Mar 2021 08:31:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238987AbhCDKtg (ORCPT + 99 others); Thu, 4 Mar 2021 05:49:36 -0500 Received: from foss.arm.com ([217.140.110.172]:36626 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238974AbhCDKtR (ORCPT ); Thu, 4 Mar 2021 05:49:17 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E30B81FB; Thu, 4 Mar 2021 02:48:31 -0800 (PST) Received: from [10.57.63.81] (unknown [10.57.63.81]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 114293F73B; Thu, 4 Mar 2021 02:48:26 -0800 (PST) Subject: Re: [PATCH v4 01/10] coresight: syscfg: Initial coresight system configuration To: Mike Leach , linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org, mathieu.poirier@linaro.org, linux-doc@vger.kernel.org Cc: yabinc@google.com, corbet@lwn.net, leo.yan@linaro.org, alexander.shishkin@linux.intel.com, tingwei@codeaurora.org, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org References: <20210128170936.9222-1-mike.leach@linaro.org> <20210128170936.9222-2-mike.leach@linaro.org> From: Suzuki K Poulose Message-ID: <4d429fd7-7aea-cf93-579a-1c43e120d9bf@arm.com> Date: Thu, 4 Mar 2021 10:48:22 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210128170936.9222-2-mike.leach@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/28/21 5:09 PM, Mike Leach wrote: > Creates an system management API to allow complex configurations and > features to be programmed into a CoreSight infrastructure. > > A feature is defined as a programming set for a device or class of > devices. > > A configuration is a set of features across the system that are enabled > for a trace session. > > The API will manage system wide configuration, and allow complex > programmed features to be added to individual device instances, and > provide for system wide configuration selection on trace capture > operations. > > This patch creates the initial data object and the initial API for > loading configurations and features. > > Signed-off-by: Mike Leach > +/** > + * Representation of register value. > + * > + * Supports full 64 bit register value, or 32 bit value with optional mask > + * value. > + * > + * @type: define register usage and interpretation. > + * @offset: the address offset for register in the hardware device (per device specification). > + * @hw_info: optional hardware device type specific information. (ETM / CTI specific etc) > + * @val64: 64 bit value. > + * @val32: 32 bit value. > + * @mask32: 32 bit mask when using 32 bit value to access device register. > + */ > +struct cscfg_regval_desc { > + struct { > + u32 type:8; > + u32 offset:12; > + u32 hw_info:12; > + }; > + union { > + u64 val64; > + struct { > + u32 val32; Since this is also overloaded with param_idx for VAL_PARAM type, please make this explicit by doing something like this, to avoid having to explain things in the code, undocumented here. union { u32 val32; u32 param_idx; }; Cheers Suzuki