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Thu, 4 Mar 2021 09:31:53 +0000 From: Philippe Schenker To: devicetree@vger.kernel.org Cc: Philippe Schenker , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: dts: colibri-imx6ull: Change drive strength for usdhc2 Date: Thu, 4 Mar 2021 10:31:39 +0100 Message-Id: <20210304093139.471554-1-philippe.schenker@toradex.com> X-Mailer: git-send-email 2.30.1 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [51.154.7.61] X-ClientProxiedBy: ZR0P278CA0103.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:23::18) To VE1PR05MB7278.eurprd05.prod.outlook.com (2603:10a6:800:1a5::23) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from philippe-pc.cardiotech.int (51.154.7.61) by ZR0P278CA0103.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:23::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3912.18 via Frontend Transport; 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PCB traces are routed with 50 Ohms impedance and there are no serial resistors on those traces. This commit changes the source-impedance to 52 Ohms to better match our hardware design. The impedances given in this commit message refer to 3.3V operation. Signed-off-by: Philippe Schenker --- arch/arm/boot/dts/imx6ull-colibri.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 4436556624d6..0cdbf7b6e728 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -522,12 +522,12 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 pinctrl_usdhc2: usdhc2-grp { fsl,pins = < - MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059 - MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059 - MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059 - MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059 - MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059 - MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17059 + MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17069 + MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17069 + MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17069 + MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17069 + MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17069 + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17069 MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10 >; -- 2.30.1