Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp1725635pxb; Thu, 4 Mar 2021 20:24:41 -0800 (PST) X-Google-Smtp-Source: ABdhPJzsJdxdLwLYo4U9SC4gY0B3jZENo9puT54a7iwQQFPczWz2kYjkJQwv9bYqp8H5rbqLWl+g X-Received: by 2002:a05:6638:91:: with SMTP id v17mr4025070jao.69.1614918281317; Thu, 04 Mar 2021 20:24:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614918281; cv=none; d=google.com; s=arc-20160816; b=E5qOrl1zxgBTQot81CjvL0QDGF8XZcUvloZ1stY4jVSip+HQtrTLhm039dMGdSRfa9 DTI8oEta1Pc2oHRFGasXqsIbvxu1MQm+gaTFMEimZYsO68eDUWAWePxymF2XAS60fv0W kKq1AEjePQ0rt+P5Z41GFkAq68csCw74MFkrSjHFr/tJ7uhZ2VXf7d6LH1iqRfa3e3Ni fXMGIk21We2MwX1ovDqXqvh895nSFrJLqofIOhq/oyo1gH5QaIIKrV7uDcZ/RBCeFd1Q BH/WWw97dciQt9s5cQQEtb1o41rtn0+Pu6onz92F7WV1cpkWM72JXySyYqqsgWZrjFKC tLlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=vF53WltEAihGOndgb5wU45z17+D/9xHpNeoUK3YRdUo=; b=gRVv7/ggPuYZ174iPOUN8G1/QkevX2L+qdkLm9quuVcfceFJ8BEV40v4+lYjESjuHC LTFZoPEmMJerrDsaAap/5Gey/+NqXQC6DX3+PH2tKXf/8Y6jaU9bicXqaqpVJQT7DCzI i/WdpYg56Fms3AkodoQ0SFdIazry4KS0pSn+T5AzTyG5lOJlHO9qHEZKgTt2BOmgpRuF udrSWNxcNTHV/9IrmdzkfDvacCQL2ZX7oT6Tm0AlbOgZwVPqTYZihzekiJ0RQFg2lnH/ AVDN7W2iy1CAwN4lC4aqV9f3o4om3vvtesOZoIp5WzTouxhv166ishOgWRZexotS4/nu TIxQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t31si1499699jal.89.2021.03.04.20.24.28; Thu, 04 Mar 2021 20:24:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229829AbhCEEW6 (ORCPT + 99 others); Thu, 4 Mar 2021 23:22:58 -0500 Received: from smtp.h3c.com ([60.191.123.50]:4132 "EHLO h3cspam02-ex.h3c.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229463AbhCEEW5 (ORCPT ); Thu, 4 Mar 2021 23:22:57 -0500 X-Greylist: delayed 4144 seconds by postgrey-1.27 at vger.kernel.org; Thu, 04 Mar 2021 23:22:56 EST Received: from h3cspam02-ex.h3c.com (localhost [127.0.0.2] (may be forged)) by h3cspam02-ex.h3c.com with ESMTP id 1253Dpjk075701; Fri, 5 Mar 2021 11:13:51 +0800 (GMT-8) (envelope-from deng.hongjie@h3c.com) Received: from DAG2EX05-BASE.srv.huawei-3com.com ([10.8.0.68]) by h3cspam02-ex.h3c.com with ESMTP id 1253D5Q3072525; Fri, 5 Mar 2021 11:13:05 +0800 (GMT-8) (envelope-from deng.hongjie@h3c.com) Received: from localhost.localdomain (10.114.40.30) by DAG2EX05-BASE.srv.huawei-3com.com (10.8.0.68) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Fri, 5 Mar 2021 11:13:06 +0800 From: HongJieDeng To: CC: , , , , , , Hongjie Deng Subject: [PATCH] MIPS: Support large stack. Date: Fri, 5 Mar 2021 11:12:57 +0800 Message-ID: <20210305031257.14936-1-deng.hongjie@h3c.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.114.40.30] X-ClientProxiedBy: BJSMTP02-EX.srv.huawei-3com.com (10.63.20.133) To DAG2EX05-BASE.srv.huawei-3com.com (10.8.0.68) X-DNSRBL: X-MAIL: h3cspam02-ex.h3c.com 1253D5Q3072525 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Hongjie Deng We need more stack space, xori/ori no longer apply when _THREAD_MASK exceeds 16 bits Signed-off-by: Hongjie Deng --- arch/mips/include/asm/stackframe.h | 8 ++++++++ arch/mips/kernel/genex.S | 6 ++++++ 2 files changed, 14 insertions(+) diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index aa430a6..6ebc39f 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -278,8 +278,16 @@ sll k0, 3 /* extract cu0 bit */ bltz k0, 9f +#if _THREAD_MASK < (1 << 16 - 1) ori $28, sp, _THREAD_MASK xori $28, _THREAD_MASK +#else + li $28, _THREAD_MASK + or $28, sp, $28 + li $24, _THREAD_MASK + xor $28, $28, $24 +#endif + #ifdef CONFIG_CPU_CAVIUM_OCTEON .set mips64 pref 0, 0($28) /* Prefetch the current pointer */ diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index bcce32a..5ea4fe4 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -662,8 +662,14 @@ isrdhwr: #endif MTC0 k0, CP0_EPC /* I hope three instructions between MTC0 and ERET are enough... */ +#if _THREAD_MASK < (1 << 16 - 1) ori k1, _THREAD_MASK xori k1, _THREAD_MASK +#else + li $24 ,_THREAD_MASK + or k1, k1, $24 + xor k1, k1, $24 +#endif LONG_L v1, TI_TP_VALUE(k1) .set push .set arch=r4000 -- 1.8.3.1