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Subject: Re: [PATCH] MIPS: Support large stack.
To:     HongJieDeng <deng.hongjie@h3c.com>, tsbogend@alpha.franken.de
Cc:     paulburton@kernel.org, chenhc@lemote.com,
        linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
        liulichao@loongson.cn, denghongjie@h3c.com
References: <20210305031257.14936-1-deng.hongjie@h3c.com>
From:   Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <54185bbe-907e-2e0b-8498-8214128d7847@flygoat.com>
Date:   Fri, 5 Mar 2021 14:59:30 +0800
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?? 2021/3/5 11:12, HongJieDeng д??:
> From: Hongjie Deng <deng.hongjie@h3c.com>
>
> We need more stack space, xori/ori no longer apply when
>   _THREAD_MASK exceeds 16 bits
>
> Signed-off-by: Hongjie Deng <deng.hongjie@h3c.com>
> ---
>   arch/mips/include/asm/stackframe.h | 8 ++++++++
>   arch/mips/kernel/genex.S           | 6 ++++++
>   2 files changed, 14 insertions(+)
>
> diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
> index aa430a6..6ebc39f 100644
> --- a/arch/mips/include/asm/stackframe.h
> +++ b/arch/mips/include/asm/stackframe.h
> @@ -278,8 +278,16 @@
>   		sll	k0, 3		/* extract cu0 bit */
>   		bltz	k0, 9f
>   
> +#if    _THREAD_MASK  < (1 << 16 - 1)
>   		ori	$28, sp, _THREAD_MASK
>   		xori	$28, _THREAD_MASK
> +#else
> +		li      $28,   _THREAD_MASK
> +		or  $28,  sp,  $28
> +		li  $24, _THREAD_MASK
> +		xor   $28, $28, $24

Hi Hongjie,

li breaks MIPS64, please try PTR_LI instead.
Also loading immediate cost a lot on MIPS,
you may save a unnecessary li by:

+		PTR_LI  v1,   _THREAD_MASK
+		or      gp,  sp,  v1
+		xor     gp,  gp,  v1

Also clobber v0/v1 seems much more reasonable than $24 here....

> +#endif
> +
>   #ifdef CONFIG_CPU_CAVIUM_OCTEON
>   		.set    mips64
>   		pref    0, 0($28)       /* Prefetch the current pointer */
> diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
> index bcce32a..5ea4fe4 100644
> --- a/arch/mips/kernel/genex.S
> +++ b/arch/mips/kernel/genex.S
> @@ -662,8 +662,14 @@ isrdhwr:
>   #endif
>   	MTC0	k0, CP0_EPC
>   	/* I hope three instructions between MTC0 and ERET are enough... */
> +#if    _THREAD_MASK  < (1 << 16 - 1)
>   	ori	k1, _THREAD_MASK
>   	xori	k1, _THREAD_MASK
> +#else
> +	li  $24 ,_THREAD_MASK
> +	or   k1, k1, $24
> +	xor   k1, k1, $24
> +#endif
Ditto.

Actually another possible solution could be `.set at=v1` around it
and let aeembler to decide if it needs a extra register.

Thanks.

- Jiaxun
>   	LONG_L	v1, TI_TP_VALUE(k1)
>   	.set	push
>   	.set	arch=r4000