Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp2043708pxb; Fri, 5 Mar 2021 06:12:45 -0800 (PST) X-Google-Smtp-Source: ABdhPJzYj8G2OrYJkr2nIAh7bE1mj97Ts8dtQy2cD25x9XB/EN1kT/oBX2ceTTao1d/uCIIOhSDn X-Received: by 2002:a05:6402:32a:: with SMTP id q10mr9050267edw.15.1614953565620; Fri, 05 Mar 2021 06:12:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614953565; cv=none; d=google.com; s=arc-20160816; b=WZ+ZBp1tzmU4TdfMy2ULZfL4Hz2LMEObsGSbppUloyrH5OvovOqYsVAkaMetrmFNJI vCWD/Xes9+L4wW6yx31hEX5GMBUHk2Z9rJg3wmN6SmVcUZ7IKbyrCQmisKAd/oHsWhZJ 3lGKdqn19mvboPjETkWmcM/bEZGXnY0bu7oea2lC5sL4AXKHJRsy0YYQIv4nZcLGxTK4 c8MDooaQq+GPN1+CAa57WKone9Rz2cYaf44UviaJ3ol6R5eSZEVSEerbSTBGZYSdLjNs XM+gBf76qOmTlzqIzZlVrkRsVUCUc9CRGCtVeYCrZsKQ/EnCX6qSAJkKjTihu69mP4sW ztfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version; bh=OmgaCqzYZtdNpJ3SZEq/xbrWUa3xhPvp+tDi/EiuDcU=; b=avSTvRJRCilhaWs8jOOzAgX3TwkVMMOKp1/bTh+gi9rjvPiWTqKUpMyoiVvchrvFVT iXUUy8P1xIeIUGkmrcn94NGV1k4dvDDfhXuicPbnY3F1AZ220rU3mbsG/83I667JkBIG muCwZ0dqZJ0pQq1HJ31ZFHQaC/0LifM5Qad0rmdNgFfxJOyf49hQ21GfGGoU8w4EOlLv dLWJy14BdZO4mCGcm+Wou7XrUdCxtcdz2ZKOBVQxmdwbA+ZDsl/btf32RcCSwlPhvAlO 3KXveE9rRo5yxSGlkBwmtijmfeBOu8UZ7agClaAuIPkQl+3Nh1Lt/09SB5aDXhJ6dapX Deng== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i8si1050714ejj.248.2021.03.05.06.12.22; Fri, 05 Mar 2021 06:12:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230432AbhCEOLZ (ORCPT + 99 others); Fri, 5 Mar 2021 09:11:25 -0500 Received: from mail-vs1-f48.google.com ([209.85.217.48]:33645 "EHLO mail-vs1-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230208AbhCEOK4 (ORCPT ); Fri, 5 Mar 2021 09:10:56 -0500 Received: by mail-vs1-f48.google.com with SMTP id b189so1030265vsd.0; Fri, 05 Mar 2021 06:10:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=OmgaCqzYZtdNpJ3SZEq/xbrWUa3xhPvp+tDi/EiuDcU=; b=XPQe7WMYhKkiLTpkkWqi2nU8OI5GdrtB+lCG4jTsmhxXwU0rBmTlvxy1fddOLhTM0j w3Fz/X3PRFsQjO+3Ujwo4+PG9ZHJVliDGodZwAmqXr4wkT9843kAj2tVKbkKZowhPInL W5M0eHcyA9+dIcyzu5i4pO7PaYFYgpJhzDgcZr7AAh8Al/vTRBGYSf1eEEJle41PJfch tCq8Pq8eIDwLVKxzjMYzL0rAT5BvJRg9kenLVRwAI0J57LHp4GeXNq3FUMHCCHkxWr48 Io8F8+MBsUW4nDM2OymeKHDEdwgBpoUgpkZrzjPcQGxDDk82mzr/GQmq8M6rBE18r/iE lyNA== X-Gm-Message-State: AOAM5309dn5XBDsoxJbkKlAQgLVYo5wEoDNrornz3+t+teexvtjvYBm2 zZ9TeKuG5DkS0dNGHGbUX7LjfQcTPjbVvah0gW7Rwat0fCw= X-Received: by 2002:a67:2245:: with SMTP id i66mr7055441vsi.18.1614953453536; Fri, 05 Mar 2021 06:10:53 -0800 (PST) MIME-Version: 1.0 References: <20210304165300.295952-1-kieran.bingham+renesas@ideasonboard.com> In-Reply-To: <20210304165300.295952-1-kieran.bingham+renesas@ideasonboard.com> From: Geert Uytterhoeven Date: Fri, 5 Mar 2021 15:10:42 +0100 Message-ID: Subject: Re: [PATCH] arm64: dts: renesas: falcon: Add GP LEDs To: Kieran Bingham Cc: Linux-Renesas , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kieran, On Thu, Mar 4, 2021 at 5:53 PM Kieran Bingham wrote: > Three general purpose LEDs are provided on the Falcon CPU board. > > Connect GP_LED1, GP_LED2, and GP_LED3 to the gpio-leds frameworks. > These LEDs are arranged in a block of four LEDs on the board itself, but > the fourth LED is as yet unidentified. > > Signed-off-by: Kieran Bingham Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts > +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts I believe the LEDs are on the CPU board, so they belong in r8a779a0-falcon-cpu.dtsi instead? > @@ -20,6 +20,20 @@ aliases { > chosen { > stdout-path = "serial0:115200n8"; > }; > + > + leds { > + compatible = "gpio-leds"; > + > + led1 { > + gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; Any need for other properties from Documentation/devicetree/bindings/leds/common.yaml, like color = ? > + }; > + led2 { > + gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; > + }; > + led3 { > + gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; > + }; > + }; > }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds