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Date:   Fri, 5 Mar 2021 15:31:15 -0600
From:   Rob Herring <robh@kernel.org>
To:     Oliver Graute <oliver.graute@gmail.com>
Cc:     shawnguo@kernel.org, m.felsch@pengutronix.de, festevam@gmail.com,
        narmstrong@baylibre.com, Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        NXP Linux Team <linux-imx@nxp.com>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Oleksij Rempel <linux@rempel-privat.de>,
        Stefan Riedmueller <s.riedmueller@phytec.de>,
        Matthias Schiffer <matthias.schiffer@ew.tq-group.com>,
        Li Yang <leoyang.li@nxp.com>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 3/3] dt-bindings: arm: fsl: Add Variscite i.MX6UL
 compatibles
Message-ID: <20210305213115.GA676128@robh.at.kernel.org>
References: <1613308450-27958-1-git-send-email-oliver.graute@gmail.com>
 <1613308450-27958-4-git-send-email-oliver.graute@gmail.com>
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On Sun, Feb 14, 2021 at 02:13:50PM +0100, Oliver Graute wrote:
> Add the compatibles for Variscite i.MX6UL compatibles
> 
> Signed-off-by: Oliver Graute <oliver.graute@gmail.com>
> ---
> 
> Changelog:
> 
> v4:
>  - added missing 6 in i.MX6
> 
>  v3:
>  - rebased
> 
>  v2:
>  - renamed binding
>  - removed superflous "
> 
>  Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
> index 297c87f..e67b622 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
> @@ -499,6 +499,7 @@ properties:
>                - technexion,imx6ul-pico-dwarf   # TechNexion i.MX6UL Pico-Dwarf
>                - technexion,imx6ul-pico-hobbit  # TechNexion i.MX6UL Pico-Hobbit
>                - technexion,imx6ul-pico-pi      # TechNexion i.MX6UL Pico-Pi
> +              - variscite,imx6ul-var-6ulcustomboard # i.MX6 UltraLite Carrier-board

Doesn't match your dts file. Plus looks like a lot of redundancy.

Run dtbs_checks and with W=1 and make sure you aren't adding more 
warnings. Lots will be from the base SoC dtsi, but feel free to fix some 
of those too.