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Date:   Sun, 7 Mar 2021 01:22:32 +0100
From:   Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= <kw@linux.com>
To:     Antti =?utf-8?B?SsOkcnZpbmVu?= <antti.jarvinen@gmail.com>
Cc:     helgaas@kernel.org, alex.williamson@redhat.com,
        bhelgaas@google.com, kishon@ti.com, linux-kernel@vger.kernel.org,
        linux-pci@vger.kernel.org, m-karicheri2@ti.com
Subject: Re: [PATCH v2] PCI: quirk for preventing bus reset on TI C667X
Message-ID: <YEQcyBVLIaGWb4sk@rocinante>
References: <20210217211817.GA914074@bjorn-Precision-5520>
 <20210228135311.668-1-antti.jarvinen@gmail.com>
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Hi Antti,

A few nitpicks, so feel free to ignore these, of course.

If possible, capitalise the subject line.  Also, perhaps "Add quirk to
prevent bus (...)" might read better.

> Some TI keystone C667X devices do no support bus/hot reset. Its PCIESS
[...]

It would be KeyStone in the above sentence.

[...]
> With this change device can be assigned to VMs with VFIO, but it will
> leak state between VMs.

Following-up on Bojrn's question about the state leak, see:
  https://lore.kernel.org/linux-pci/20210129234946.GA124037@bjorn-Precision-5520/

Would there be anything else that has to be done?

Krzysztof