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[23.128.96.18]) by mx.google.com with ESMTP id dr9si7597986ejc.436.2021.03.08.09.48.54; Mon, 08 Mar 2021 09:49:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230173AbhCHRrp (ORCPT + 99 others); Mon, 8 Mar 2021 12:47:45 -0500 Received: from elvis.franken.de ([193.175.24.41]:58711 "EHLO elvis.franken.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230212AbhCHRrS (ORCPT ); Mon, 8 Mar 2021 12:47:18 -0500 Received: from uucp (helo=alpha) by elvis.franken.de with local-bsmtp (Exim 3.36 #1) id 1lJJyO-0007UB-00; Mon, 08 Mar 2021 18:47:16 +0100 Received: by alpha.franken.de (Postfix, from userid 1000) id 04EF4C133D; Mon, 8 Mar 2021 18:45:23 +0100 (CET) Date: Mon, 8 Mar 2021 18:45:23 +0100 From: Thomas Bogendoerfer To: Rob Herring Cc: Paul Cercueil , od@zcrc.me, "open list:MIPS" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] MIPS: boot/compressed: Copy DTB to aligned address Message-ID: <20210308174523.GA13680@alpha.franken.de> References: <20210303193305.924384-1-paul@crapouillou.net> <20210306084513.GA5453@alpha.franken.de> <20210306225855.GA3574@alpha.franken.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 08, 2021 at 10:04:15AM -0700, Rob Herring wrote: > On Sat, Mar 6, 2021 at 3:59 PM Thomas Bogendoerfer > wrote: > > > > On Sat, Mar 06, 2021 at 02:35:21PM -0700, Rob Herring wrote: > > > On Sat, Mar 6, 2021 at 1:45 AM Thomas Bogendoerfer > > > wrote: > > > > > > > > On Wed, Mar 03, 2021 at 02:37:55PM -0600, Rob Herring wrote: > > > > > On Wed, Mar 3, 2021 at 1:33 PM Paul Cercueil wrote: > > > > > > > > > > > > Since 5.12-rc1, the Device Tree blob must now be properly aligned. > > > > > > > > > > I had checked the other built-in cases as microblaze broke too, but > > > > > missed some of the many ways MIPS can have a dtb. Appended and > > > > > built-in DTBs were supposed to be temporary. :( > > > > > > > > and a fdt can also be provided by firmware. And according to spec > > > > there is no aligmnet requirement. So this whole change will break > > > > then. What was the reason for the whole churn ? > > Actually, that is wrong. The spec defines the alignment (from > flattened format appendix): I was talking about the "Unified Hosting Interface" from MIPS/Imagination. As the spec talks about device tree blob all firmware developer knew about the fdt alignment rules. > > the access macros are using *(unsigned long long *), which isn't > > even nice for 32bit CPUs... > > Where are those? nowhere, I've missread the code in libfdt_env.h > > > As part of this, a dtb alignment check was added. So worst case, we > > > could disable that if need be. > > > > yeah, or override fdt32/64_to_cpu, if I understood the code correctly. > > No, fdt32/64_to_cpu don't dereference the pointer. you are right, brainfart on my side. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]