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Date:   Mon, 8 Mar 2021 16:09:53 -0700
From:   Rob Herring <robh@kernel.org>
To:     Kishon Vijay Abraham I <kishon@ti.com>
Cc:     linux-kernel@vger.kernel.org, Lokesh Vutla <lokeshvutla@ti.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Swapnil Jakhade <sjakhade@cadence.com>,
        Vinod Koul <vkoul@kernel.org>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 11/13] dt-bindings: phy: phy-cadence-sierra: Add
 binding to model Sierra as clock provider
Message-ID: <20210308230953.GA3121857@robh.at.kernel.org>
References: <20210308050732.7140-1-kishon@ti.com>
 <20210308050732.7140-12-kishon@ti.com>
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On Mon, 08 Mar 2021 10:37:30 +0530, Kishon Vijay Abraham I wrote:
> Add #clock-cells binding to model Sierra as clock provider and include
> clock IDs for PLL_CMNLC and PLL_CMNLC1.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  .../bindings/phy/phy-cadence-sierra.yaml        | 17 ++++++++++++++++-
>  include/dt-bindings/phy/phy-cadence.h           |  4 ++++
>  2 files changed, 20 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>