Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
MIME-Version: 1.0
References: <20210225095216.28591-1-nsaenzjulienne@suse.de>
In-Reply-To: <20210225095216.28591-1-nsaenzjulienne@suse.de>
From:   Ulf Hansson <ulf.hansson@linaro.org>
Date:   Tue, 9 Mar 2021 09:14:53 +0100
Message-ID: <CAPDyKFoN6WERg=wq7Fo-iykDSp6w7eC1aRFi4Qih0wZ=LSR4XA@mail.gmail.com>
Subject: Re: [RFC 0/2] sdhci-iproc CMD timeouts
To:     Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc:     Linux ARM <linux-arm-kernel@lists.infradead.org>,
        "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
        DTML <devicetree@vger.kernel.org>,
        BCM Kernel Feedback <bcm-kernel-feedback-list@broadcom.com>,
        "moderated list:BROADCOM BCM2835..." 
        <linux-rpi-kernel@lists.infradead.org>,
        Florian Fainelli <f.fainelli@gmail.com>, phil@raspberrypi.com,
        tim.gover@raspberrypi.com, Adrian Hunter <adrian.hunter@intel.com>,
        Scott Branden <sbranden@broadcom.com>,
        Al Cooper <alcooperx@gmail.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

On Thu, 25 Feb 2021 at 10:53, Nicolas Saenz Julienne
<nsaenzjulienne@suse.de> wrote:
>
> I'm seeing a rather odd behavior from sdhci-iproc's integration in BCM2711
> (Raspberry Pi 4's SoC), and would appreciate some opinions.
>
> The controller will timeout on SDHCI CMDs under the following conditions:
>
>  - No SD card plugged in (the card polling thread is running, CD irq disabled).
>  - BCM2711's VPU clock[1] configured at 500MHz or more, lower clocks are OK.
>
> There is no specific command that will time out, it seems random.
>
> Here's what I found out. The SDHCI controller runs at 100MHz, by bumping the
> frequency to 150MHz the issue disapears. Might be pure luck, or maybe I hit the
> nail and it's proper interference. Can't say.

As you probably know, I don't have the in-depth knowledge about this
HW. Although, let me provide a very vague guess. Could be that the
controller needs a higher clock rate to stay within some spec, for an
OPP/voltage domain for example?

In any case, assuming you get some confirmation from the Broadcom
folkz that this makes sense, you  need to update the DT doc bindings
to add the clock-frequency property. In regards to this, please take
the opportunity to convert from legacy DT doc format
(brcm,sdhci-iproc.txt) into the new yaml format.

Kind regards
Uffe

>
> Regards,
> Nicolas
>
> ---
>
> [1] For those who are not aware, here's the relationship between VPU's clock
>     and emmc2's:
>
>          osc                                    54000000
>             plld                              3000000091
>                plld_per                        750000023
>                   emmc2                        149882908
>             pllc                              2999999988
>                pllc_core0                      999999996
>                   vpu                          499999998
>
> Nicolas Saenz Julienne (2):
>   ARM: dts: Fix-up EMMC2 controller's frequency
>   mmc: sdhci-iproc: Set clock frequency as per DT
>
>  arch/arm/boot/dts/bcm2711-rpi-4-b.dts |  6 ++++++
>  drivers/mmc/host/sdhci-iproc.c        | 10 ++++++++++
>  2 files changed, 16 insertions(+)
>
> --
> 2.30.1
>