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Date:   Wed, 10 Mar 2021 10:35:39 +0000
From:   Lee Jones <lee.jones@linaro.org>
To:     Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc:     Wolfram Sang <wsa+renesas@sang-engineering.com>,
        Jean Delvare <jdelvare@suse.de>,
        Tan Jui Nee <jui.nee.tan@intel.com>,
        Jim Quinlan <james.quinlan@broadcom.com>,
        Jonathan Yong <jonathan.yong@intel.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org,
        linux-pci@vger.kernel.org, Jean Delvare <jdelvare@suse.com>,
        Peter Tyser <ptyser@xes-inc.com>, hdegoede@redhat.com,
        henning.schild@siemens.com
Subject: Re: [PATCH v1 5/7] mfd: lpc_ich: Switch to generic pci_p2sb_bar()
Message-ID: <20210310103539.GF701493@dell>
References: <20210308122020.57071-1-andriy.shevchenko@linux.intel.com>
 <20210308122020.57071-6-andriy.shevchenko@linux.intel.com>
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In-Reply-To: <20210308122020.57071-6-andriy.shevchenko@linux.intel.com>
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On Mon, 08 Mar 2021, Andy Shevchenko wrote:

> Instead of open coding pci_p2sb_bar() functionality we are going to
> use generic library for that. There one more user of it is coming.
> 
> Besides cleaning up it fixes a potential issue if, by some reason,
> SPI bar is 64-bit.

Probably worth cleaning up the English in both these sections.

 Instead of open coding pci_p2sb_bar() functionality we are going to
 use generic library. There is one more user en route.

 This is more than just a clean-up.  It also fixes a potential issue
 seen when SPI bar is 64-bit.

Also worth briefly describing what that issue is I think.

> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  drivers/mfd/Kconfig   |  1 +
>  drivers/mfd/lpc_ich.c | 20 ++++++--------------
>  2 files changed, 7 insertions(+), 14 deletions(-)

Code looks fine:

For my own reference (apply this as-is to your sign-off block):

  Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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