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From:   Nava kishore Manne <navam@xilinx.com>
To:     Rob Herring <robh@kernel.org>
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Subject: RE: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal fpga
 manager
Thread-Topic: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal
 fpga manager
Thread-Index: AQHXEMVdMsyP8+vbRE2oyddQhLKezap6jzYAgAKDMvA=
Date:   Wed, 10 Mar 2021 10:49:54 +0000
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 <20210308201944.GA2886704@robh.at.kernel.org>
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Hi Rob,

	Thanks for providing the review comments.
Please find my response inline.

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Tuesday, March 9, 2021 1:50 AM
> To: Nava kishore Manne <navam@xilinx.com>
> Cc: mdf@kernel.org; trix@redhat.com; Michal Simek <michals@xilinx.com>;
> gregkh@linuxfoundation.org; Jolly Shah <JOLLYS@xilinx.com>; Rajan Vaja
> <RAJANV@xilinx.com>; arnd@arndb.de; Manish Narani
> <MNARANI@xilinx.com>; Amit Sunil Dhamne <amitsuni@xilinx.com>; Tejas
> Patel <tejasp@xlnx.xilinx.com>; linux-fpga@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; chinnikishore369@gmail.com; Appana Durga
> Kedareswara Rao <appanad@xilinx.com>
> Subject: Re: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal=
 fpga
> manager
>=20
> On Thu, Mar 04, 2021 at 12:32:23PM +0530, Nava kishore Manne wrote:
> > From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
> >
> > This patch adds binding doc for versal fpga manager driver.
>=20
> Why do you need a DT entry for this? Can't the Versal firmware driver
> instantiate the fpga-mgr device?
>=20
This dt entry is need to handle the fpga regions properly for both full and=
 Partial bitstream loading use cases and it cannot be done by Versal firmwa=
re driver instantiate.

Complete firmware DT node example is shown below for your reference.
Example for full FPGA configuration:
fpga-region0 {
	compatible =3D "fpga-region";
	fpga-mgr =3D <&versal_fpga>;
	#address-cells =3D <0x1>;
	#size-cells =3D <0x1>;
};

firmware {
	zynqmp_firmware: zynqmp-firmware {
		compatible =3D "xlnx,zynqmp-firmware";
		method =3D "smc";
		versal_fpga: fpga {
			compatible =3D "xlnx,versal-fpga";
		};
	};
};

Please correct me if my understanding is wrong...

Regards,
Navakishore.