Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp180141pxf; Wed, 10 Mar 2021 03:50:42 -0800 (PST) X-Google-Smtp-Source: ABdhPJy9ciMQFiUF0qJTrpY/QliRerCavKMQX+3a3n1bYe28UhllE7wMG/IXv47KifNAADBiVQGc X-Received: by 2002:a05:6402:4245:: with SMTP id g5mr2793414edb.306.1615377042572; Wed, 10 Mar 2021 03:50:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615377042; cv=none; d=google.com; s=arc-20160816; b=LEM3CR+KNY+l37wcSV8LMpVGLMtp2V4QAHCjSpUqm2wDUDiptVbENsKh7DfuENPM5u eefytzxL4mq+RzovrWSyLzLlCmi3GKDRsFSAkqp4N+CmgogNxxDv/0EfLT7EBe/Si5jm QHra7BbvZqN3f/o4CU8+2aW2N8qYmr+KqP0ROMc5q8/OQKM36wZ0uvli6eLc24xtesqS OxjZxNt9JvwWRa1hH1LNVkb6qMPoQZcV0kr6eySQiIbqAqsLgFcmvdxYte/EuWOtAHGG c1cL3o0Cqy/f1GDp3ABCKkrCvCg1P6pmJ260FdhVl3i+g2z6ViqsC2J6bCv2UFsbmvQF UPZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=MgumKQ8A8vujpcGidnQ3C//AKqkYksiK7PMribHV3ho=; b=f+RAbmC5pielwwRWuHRR6JT008tAVcMNFjjaN3qkmJj+ieqmMuFt0R64fD8enhXYTI EEAYjwasFayk0Kvs4wCHE6ykiW/oH23O4MAA8NJe7ikQVx5JZ1wzwkIT5XeMIDNwtEjc /SRVYWWHZ5S7U90Q4pjz4DPQoR/6LSCYWy8KaRNPlJGQkbgCZrfRxOYwGONrRA8PDCMF //zks8KcKvgS+WTiTIxnBwcaRf3y7Jj1G/nB3v2t7C+lDorLfiwllNMmxdKaJxtMjYDL mx7jwA+7KjiymUBE8vM2oRb2aLY6EAr8gDtho6+y/SebykHxrnh8fO5OOripgOciGg6L TJdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=DYUnOI1x; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j19si10988341edp.531.2021.03.10.03.50.19; Wed, 10 Mar 2021 03:50:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=DYUnOI1x; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229790AbhCJLsw (ORCPT + 99 others); Wed, 10 Mar 2021 06:48:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229948AbhCJLsX (ORCPT ); Wed, 10 Mar 2021 06:48:23 -0500 Received: from mail-io1-xd36.google.com (mail-io1-xd36.google.com [IPv6:2607:f8b0:4864:20::d36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D1ECC06174A; Wed, 10 Mar 2021 03:48:23 -0800 (PST) Received: by mail-io1-xd36.google.com with SMTP id n14so17572059iog.3; Wed, 10 Mar 2021 03:48:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to; bh=MgumKQ8A8vujpcGidnQ3C//AKqkYksiK7PMribHV3ho=; b=DYUnOI1xkybUKmjxUsxK/1caGOqEuExlhcOTDQXGlBsUyZc6CRZGuKVBBBULTOVD+P aXQM/f5OrhNjI1N8kqj4OVJJq6VRKWOacQ4wnVSC+WconVS3D06jcWFpgMWd4+fcGj7U YO3bCVtF/4IFiLXzdDU3KrFSxjQKz/uzYD+eOaA026la9A0q7zn7jCjnAgeeiS3eZDYr hTs3eD6uVyZLbk7pptQgtEJZhXd+shP7DyW466TFg7u5B8JREcn8RDDaIAuPUIm7urRj s+VBoOhVPPyNtvpqe+NQaeUCeZWUBFWtU18BF37s8A1fwwKdwCy+oP1jgFypQMNy6IYw Zr4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to; bh=MgumKQ8A8vujpcGidnQ3C//AKqkYksiK7PMribHV3ho=; b=g/JnMepo0ksPEkPwQFJsETeQpw31Mv6rffgMBEmEHPxrI39/kf8b/OKvWNr679Se/o D+qJ+2ww2Y88k0BAaQQMUzfTjX4gM5AT2d6kQpeVeqQ3qdLYIdu5lUpbhqMlYoDt2OiF DcAOoAyfmPCOgwdNxULCDFArjoxLYruBudWqfUFT/93NjBVP2VuzxCmnNZ6Rws/VfNEm GxjTOyI2jsdENGcEnFoGZXN43GtiSJVY/gIyPMyQJRiLP+QW5TgH9KQpgRdSQ0g7dSF6 A2ja5MdVB0mUzAx1YHxGDLAxI1FBMgVMziPva2fhOQrZxq9QFCQhPPvrM/W5hZjPajSV UbiQ== X-Gm-Message-State: AOAM532pFWqdOpGEA5BS3qZLuchiuhoH3p9y5FuBZU6wfMnLaCtP8rBk lp3d7h0gAcXvfw9ZzjMYzwZ2Y2A6/OMdWq1SIz8= X-Received: by 2002:a5e:cb4d:: with SMTP id h13mr2073997iok.68.1615376902761; Wed, 10 Mar 2021 03:48:22 -0800 (PST) MIME-Version: 1.0 References: <1614758717-18223-1-git-send-email-dillon.minfei@gmail.com> In-Reply-To: <1614758717-18223-1-git-send-email-dillon.minfei@gmail.com> From: dillon min Date: Wed, 10 Mar 2021 19:47:46 +0800 Message-ID: Subject: Re: [PATCH 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support To: Rob Herring , Maxime Coquelin , Alexandre Torgue , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-stm32@st-md-mailman.stormreply.com, Linux ARM , Linux Kernel Mailing List , linux@armlinux.org.uk, Vladimir Murzin , afzal.mohd.ma@gmail.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org for the device tree part , still waiting review. just a gentle ping. if Mr Alexandre torgue can take a look, would be great. thanks, On Wed, Mar 3, 2021 at 4:05 PM wrote: > > From: dillon min > > This patchset intend to add art-pi board support, this board developed > by rt-thread(https://www.rt-thread.org/). > > Board resources: > > 8MiB QSPI flash > 16MiB SPI flash > 32MiB SDRAM > AP6212 wifi,bt,fm comb > > sw context: > - as stm32h750 just has 128k bytes internal flash, so running a fw on > internal flash to download u-boot/kernel to qspi flash, boot > u-boot/kernel from qspi flash. this fw is based on rt-thread. > - kernel can be xip on qspi flash or load to sdram > - root filesystem is jffs2(created by buildroot), stored on spi flash > > to support the boad, add following changes. > - fix r0-r3, r12 register restore failed after svc call, > - add dts binding > - update yaml doc > > dillon min (8): > ARM: ARMv7-M: Fix register restore corrupt after svc call > Documentation: arm: stm32: Add stm32h750 value line > dt-bindings: arm: stm32: Add compatible strings for ART-PI board > dt-bindings: pinctrl: stm32: Add stm32h750 pinctrl > ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h75x > ARM: dts: stm32: add stm32h750-pinctrl.dtsi > ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 > ARM: stm32: add initial support for stm32h750 > > Documentation/arm/index.rst | 1 + > Documentation/arm/stm32/stm32h750-overview.rst | 33 ++ > .../devicetree/bindings/arm/stm32/stm32.yaml | 4 + > .../bindings/pinctrl/st,stm32-pinctrl.yaml | 1 + > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 392 +++++++++++++++++++++ > arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 307 +--------------- > arch/arm/boot/dts/stm32h743.dtsi | 30 ++ > arch/arm/boot/dts/stm32h750-pinctrl.dtsi | 11 + > arch/arm/boot/dts/stm32h750.dtsi | 5 + > arch/arm/boot/dts/stm32h750i-art-pi.dts | 227 ++++++++++++ > arch/arm/mach-stm32/board-dt.c | 1 + > arch/arm/mm/proc-v7m.S | 5 +- > 13 files changed, 716 insertions(+), 302 deletions(-) > create mode 100644 Documentation/arm/stm32/stm32h750-overview.rst > create mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi > create mode 100644 arch/arm/boot/dts/stm32h750-pinctrl.dtsi > create mode 100644 arch/arm/boot/dts/stm32h750.dtsi > create mode 100644 arch/arm/boot/dts/stm32h750i-art-pi.dts > > -- > 2.7.4 >