Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Subject: Re: [RFC PATCH 07/12] gpio: amd-fch: add oftree probing support
To:     Linus Walleij <linus.walleij@linaro.org>,
        "Enrico Weigelt, metux IT consult" <info@metux.net>
Cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Rafael J. Wysocki" <rafael@kernel.org>,
        Bartosz Golaszewski <bgolaszewski@baylibre.com>,
        Rob Herring <robh+dt@kernel.org>,
        Frank Rowand <frowand.list@gmail.com>,
        Pantelis Antoniou <pantelis.antoniou@konsulko.com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>
References: <20210208222203.22335-1-info@metux.net>
 <20210208222203.22335-8-info@metux.net>
 <CACRpkdb5R+VQrv0QuKa+EYmAMkodRpyv4fV1QCWQ+vcEyd0sZQ@mail.gmail.com>
From:   "Enrico Weigelt, metux IT consult" <info@metux.net>
Message-ID: <acae5f9a-1cc8-46e1-2b3b-c806679ef062@metux.net>
Date:   Thu, 11 Mar 2021 11:17:15 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
 Thunderbird/78.8.0
MIME-Version: 1.0
In-Reply-To: <CACRpkdb5R+VQrv0QuKa+EYmAMkodRpyv4fV1QCWQ+vcEyd0sZQ@mail.gmail.com>
Content-Type: text/plain; charset=utf-8; format=flowed
Content-Language: tl
Content-Transfer-Encoding: 8bit
Precedence: bulk

On 01.03.21 15:51, Linus Walleij wrote:

Hi,

> I don't know what the idea is with this but register are not normally defined
> in the DTS files. The registers are determined from the compatible value.

The idea is basically replacing the pdata struct by oftree node.
(subsequent patches in this queue use this by doing the board setup via
compiled-in dtb, instead of the currently hardcoded tables).

On these SoCs, the gpio setup is a little bit more complex than just
having a fixed range of registers (one per pin): the actual meaning
depends und Soc model and board type - some regs aren't even gpios.
(I'm still in progress of RE'ing the bios blob, to find out more,
eg. pinmux setups, etc). Writing to the wrong regs can cause weird
effects (actually not even sure whether it could lead to damage)

In essence: only a specific subset of the register range can be used
for GPIOs - the others shouldn't ever be touched. And this specific
subset is soc/board specific.


--mtx

-- 
---
Hinweis: unverschlüsselte E-Mails können leicht abgehört und manipuliert
werden ! Für eine vertrauliche Kommunikation senden Sie bitte ihren
GPG/PGP-Schlüssel zu.
---
Enrico Weigelt, metux IT consult
Free software and Linux embedded engineering
info@metux.net -- +49-151-27565287