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Date:   Sat, 13 Mar 2021 04:46:20 +0530
From:   Bhaskar Chowdhury <unixbhaskar@gmail.com>
To:     Krzysztof Kozlowski <krzk@kernel.org>
Cc:     rjw@rjwysocki.net, viresh.kumar@linaro.org,
        linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
        rdunlap@infradead.org
Subject: Re: [PATCH] cpufreq: Rudimentary typos fix in the file
 s5pv210-cpufreq.c
Message-ID: <YEv2RDAdeJEU75ib@Gentoo>
Mail-Followup-To: Bhaskar Chowdhury <unixbhaskar@gmail.com>,
        Krzysztof Kozlowski <krzk@kernel.org>, rjw@rjwysocki.net,
        viresh.kumar@linaro.org, linux-pm@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
        rdunlap@infradead.org
References: <20210312120817.12604-1-unixbhaskar@gmail.com>
 <4c0c0738-72c3-7704-500a-28cb1a068aa1@kernel.org>
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On 15:01 Fri 12 Mar 2021, Krzysztof Kozlowski wrote:
>On 12/03/2021 13:08, Bhaskar Chowdhury wrote:
>>
>> s/untile/until/
>> s/souce/source/
>> s/divier/divider/
>>
>> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
>> ---
>>  drivers/cpufreq/s5pv210-cpufreq.c | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c
>> index bed496cf8d24..1cfea5339beb 100644
>> --- a/drivers/cpufreq/s5pv210-cpufreq.c
>> +++ b/drivers/cpufreq/s5pv210-cpufreq.c
>> @@ -378,7 +378,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
>>  		/*
>>  		 * 6. Turn on APLL
>>  		 * 6-1. Set PMS values
>> -		 * 6-2. Wait untile the PLL is locked
>> +		 * 6-2. Wait until the PLL is locked
>>  		 */
>>  		if (index == L0)
>>  			writel_relaxed(APLL_VAL_1000, S5P_APLL_CON);
>> @@ -390,7 +390,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
>>  		} while (!(reg & (0x1 << 29)));
>>
>>  		/*
>> -		 * 7. Change souce clock from SCLKMPLL(667Mhz)
>> +		 * 7. Change source clock from SCLKMPLL(667Mhz)
>>  		 * to SCLKA2M(200Mhz) in MFC_MUX and G3D MUX
>>  		 * (667/4=166)->(200/4=50)Mhz
>>  		 */
>> @@ -439,7 +439,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
>>  	}
>>
>>  	/*
>> -	 * L4 level need to change memory bus speed, hence onedram clock divier
>> +	 * L4 level need to change memory bus speed, hence onedram clock divider
>
>Also grammar fix: need/needs.
>
Hmmm ...good catch...V2 on the way...

>Best regards,
>Krzysztof

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